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| author | Sibi Sankar <sibi.sankar@oss.qualcomm.com> | 2026-05-11 18:13:21 +0530 |
|---|---|---|
| committer | Bjorn Andersson <andersson@kernel.org> | 2026-07-05 11:46:17 -0500 |
| commit | 44c655a08c9ee9590e64f8306a66917bbb629970 (patch) | |
| tree | 85e42562a600a4f25d5144deb539b0ff0d06424f | |
| parent | 9594ee0e018dd8657e601b866ae3789ba9eb2e74 (diff) | |
| download | linux-44c655a08c9ee9590e64f8306a66917bbb629970.tar.gz linux-44c655a08c9ee9590e64f8306a66917bbb629970.zip | |
arm64: dts: qcom: glymur-crd: Add Embedded controller node
Add embedded controller node for Glymur CRDs which adds fan control,
temperature sensors, access to EC state changes through SCI events
and suspend entry/exit notifications to the EC.
Signed-off-by: Sibi Sankar <sibi.sankar@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
Co-developed-by: Anvesh Jain P <anvesh.p@oss.qualcomm.com>
Signed-off-by: Anvesh Jain P <anvesh.p@oss.qualcomm.com>
Tested-by: Anthony Ruhier <aruhier@mailbox.org>
Link: https://lore.kernel.org/r/20260511-add-driver-for-ec-v9-3-e5437c39b7f8@oss.qualcomm.com
[bjorn: Added i2c alias for &i2c9]
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
| -rw-r--r-- | arch/arm64/boot/dts/qcom/glymur-crd.dtsi | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/glymur-crd.dtsi b/arch/arm64/boot/dts/qcom/glymur-crd.dtsi index e784b538f42e..f7478b59624e 100644 --- a/arch/arm64/boot/dts/qcom/glymur-crd.dtsi +++ b/arch/arm64/boot/dts/qcom/glymur-crd.dtsi @@ -22,6 +22,7 @@ i2c0 = &i2c0; i2c1 = &i2c4; i2c2 = &i2c5; + i2c3 = &i2c9; spi0 = &spi18; }; @@ -444,6 +445,22 @@ }; }; +&i2c9 { + clock-frequency = <400000>; + + status = "okay"; + + embedded-controller@76 { + compatible = "qcom,glymur-crd-ec", "qcom,hamoa-crd-ec"; + reg = <0x76>; + + interrupts-extended = <&tlmm 66 IRQ_TYPE_EDGE_FALLING>; + + pinctrl-0 = <&ec_int_n_default>; + pinctrl-names = "default"; + }; +}; + &pcie3b { vddpe-3v3-supply = <&vreg_nvmesec>; @@ -596,6 +613,12 @@ bias-disable; }; + ec_int_n_default: ec-int-n-state { + pins = "gpio66"; + function = "gpio"; + bias-disable; + }; + pcie4_default: pcie4-default-state { clkreq-n-pins { pins = "gpio147"; |