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| author | Krishna Kurapati <krishna.kurapati@oss.qualcomm.com> | 2026-07-12 20:58:35 +0530 |
|---|---|---|
| committer | Vinod Koul <vkoul@kernel.org> | 2026-07-22 13:50:45 +0530 |
| commit | 49e3105844f8dbcb7f92567b77e9f3a0a802a433 (patch) | |
| tree | a27aa8d3fceb50c670cef9bb35c5f5350661ff6f | |
| parent | 8d3f1d5ce02152044cd3fbae201e47742b957dfd (diff) | |
| download | linux-49e3105844f8dbcb7f92567b77e9f3a0a802a433.tar.gz linux-49e3105844f8dbcb7f92567b77e9f3a0a802a433.zip | |
dt-bindings: phy: qcs615-qmp-usb3dp: Add support for Shikra SoC
Declare the USB-C QMP PHY present on the Qualcomm Shikra SoC. Shikra uses
3 resets to be programmed before initialising the phy. As per the hardware
documentation, the third reset is PHY_PRIM_SP0_BCR, hence naming it "phy".
Also, add remote endpoints and orientation switch support for getting
Type-C orientation information.
Signed-off-by: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Link: https://patch.msgid.link/20260712-usb-shikra-phy-v6-v6-2-1b3e51bf1541@oss.qualcomm.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
| -rw-r--r-- | Documentation/devicetree/bindings/phy/qcom,qcs615-qmp-usb3dp-phy.yaml | 49 |
1 files changed, 48 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/phy/qcom,qcs615-qmp-usb3dp-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,qcs615-qmp-usb3dp-phy.yaml index efb465c71c1b..98397006fa62 100644 --- a/Documentation/devicetree/bindings/phy/qcom,qcs615-qmp-usb3dp-phy.yaml +++ b/Documentation/devicetree/bindings/phy/qcom,qcs615-qmp-usb3dp-phy.yaml @@ -18,6 +18,7 @@ properties: compatible: enum: - qcom,qcs615-qmp-usb3-dp-phy + - qcom,shikra-qmp-usb3-dp-phy reg: maxItems: 1 @@ -33,12 +34,15 @@ properties: - const: pipe resets: - maxItems: 2 + minItems: 2 + maxItems: 3 reset-names: + minItems: 2 items: - const: phy_phy - const: dp_phy + - const: phy vdda-phy-supply: true @@ -63,6 +67,22 @@ properties: - description: offset of the PHY mode register description: Clamp and PHY mode register present in the TCSR + orientation-switch: + description: + Flag the PHY as possible handler of USB Type-C orientation switching + type: boolean + + ports: + $ref: /schemas/graph.yaml#/properties/ports + properties: + port@0: + $ref: /schemas/graph.yaml#/properties/port + description: Output endpoint of the PHY + + port@1: + $ref: /schemas/graph.yaml#/properties/port + description: Incoming endpoint from the USB controller + required: - compatible - reg @@ -78,6 +98,33 @@ required: additionalProperties: false +allOf: + - if: + properties: + compatible: + contains: + enum: + - qcom,shikra-qmp-usb3-dp-phy + then: + properties: + resets: + minItems: 3 + reset-names: + minItems: 3 + + - if: + properties: + compatible: + contains: + enum: + - qcom,qcs615-qmp-usb3-dp-phy + then: + properties: + resets: + maxItems: 2 + reset-names: + maxItems: 2 + examples: - | #include <dt-bindings/clock/qcom,qcs615-gcc.h> |