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authorNick Xie <nick@khadas.com>2026-03-25 15:06:17 +0800
committerNeil Armstrong <neil.armstrong@linaro.org>2026-06-02 09:49:45 +0200
commit4badf8d60daf72964807f4d8d89ae7f41868d901 (patch)
treec7e91fdaf30289bf0b6487fbe140a110d111e114
parent8c45bf9ae4efcecd2f91bc3e6f567280721fd0fd (diff)
downloadlinux-4badf8d60daf72964807f4d8d89ae7f41868d901.tar.gz
linux-4badf8d60daf72964807f4d8d89ae7f41868d901.zip
arm64: dts: amlogic: meson-s4: add internal SARADC controller
Add the SARADC (Successive Approximation Register ADC) controller node to the Meson S4 SoC dtsi. It uses the S4-specific compatible string with a fallback to the G12A generation, as there are no known hardware differences. Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Nick Xie <nick@khadas.com> Link: https://patch.msgid.link/20260325070618.81955-4-nick@khadas.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
-rw-r--r--arch/arm64/boot/dts/amlogic/meson-s4.dtsi14
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/amlogic/meson-s4.dtsi b/arch/arm64/boot/dts/amlogic/meson-s4.dtsi
index 4a3e9ad82d28..936a5c1353d1 100644
--- a/arch/arm64/boot/dts/amlogic/meson-s4.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-s4.dtsi
@@ -77,6 +77,20 @@
};
};
+ saradc: adc@fe026000 {
+ compatible = "amlogic,meson-s4-saradc",
+ "amlogic,meson-g12a-saradc";
+ reg = <0x0 0xfe026000 0x0 0x48>;
+ #io-channel-cells = <1>;
+ interrupts = <GIC_SPI 181 IRQ_TYPE_EDGE_RISING>;
+ clocks = <&xtal>,
+ <&clkc_periphs CLKID_SAR_ADC>,
+ <&clkc_periphs CLKID_SARADC>,
+ <&clkc_periphs CLKID_SARADC_SEL>;
+ clock-names = "clkin", "core", "adc_clk", "adc_sel";
+ status = "disabled";
+ };
+
soc {
compatible = "simple-bus";
#address-cells = <2>;