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| author | Teguh Sobirin <teguh@sobir.in> | 2026-06-05 17:49:39 -0500 |
|---|---|---|
| committer | Bjorn Andersson <andersson@kernel.org> | 2026-07-07 22:07:22 -0500 |
| commit | 50c0854e2703b4e446f83680d7eb0dc0bd5bb34d (patch) | |
| tree | 4af324542491273248d2180a49b55002e18c4edf | |
| parent | 4614628bea862cbad0ec3323200900a1f34e98c5 (diff) | |
| download | linux-50c0854e2703b4e446f83680d7eb0dc0bd5bb34d.tar.gz linux-50c0854e2703b4e446f83680d7eb0dc0bd5bb34d.zip | |
arm64: dts: qcom: sm8750: Add UART15
Add uart15 node for the UART bus present on the sm8750 SoC.
Signed-off-by: Teguh Sobirin <teguh@sobir.in>
Signed-off-by: Aaron Kling <webgeek1234@gmail.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260605-sm8750-uart15-v1-1-93e660722e61@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
| -rw-r--r-- | arch/arm64/boot/dts/qcom/sm8750.dtsi | 30 |
1 files changed, 30 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/sm8750.dtsi b/arch/arm64/boot/dts/qcom/sm8750.dtsi index 8967b3817f55..7634d132f07f 100644 --- a/arch/arm64/boot/dts/qcom/sm8750.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8750.dtsi @@ -1218,6 +1218,28 @@ status = "disabled"; }; + + uart15: serial@89c000 { + compatible = "qcom,geni-uart"; + reg = <0x0 0x0089c000 0x0 0x4000>; + + interrupts = <GIC_SPI 462 IRQ_TYPE_LEVEL_HIGH>; + + clocks = <&gcc GCC_QUPV3_WRAP2_S7_CLK>; + clock-names = "se"; + + interconnects = <&clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS + &clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS>, + <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS + &config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS>; + interconnect-names = "qup-core", + "qup-config"; + + pinctrl-0 = <&qup_uart15_default>; + pinctrl-names = "default"; + + status = "disabled"; + }; }; i2c_master_hub_0: geniqup@9c0000 { @@ -4060,6 +4082,14 @@ bias-pull-down; }; + qup_uart15_default: qup-uart15-default-state { + /* TX, RX */ + pins = "gpio30", "gpio31"; + function = "qup2_se7"; + drive-strength = <2>; + bias-pull-up; + }; + sdc2_sleep: sdc2-sleep-state { clk-pins { pins = "sdc2_clk"; |