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| author | Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> | 2025-08-30 11:39:19 +0200 |
|---|---|---|
| committer | Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> | 2025-08-31 12:56:55 +0200 |
| commit | 59abe5c87267f1f3bd627af20355b490b59f9901 (patch) | |
| tree | 7fbfcfebe67be88533b41307e9039be0cc2a670a | |
| parent | a874b387213bd80b1288884aeb427cb7599eb5ea (diff) | |
| download | linux-59abe5c87267f1f3bd627af20355b490b59f9901.tar.gz linux-59abe5c87267f1f3bd627af20355b490b59f9901.zip | |
arm64: dts: exynos2200: Add default GIC address cells
Add missing address-cells 0 to GIC interrupt node. Value '0' is correct
because GIC interrupt controller does not have children.
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Link: https://lore.kernel.org/r/20250830093918.24619-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
| -rw-r--r-- | arch/arm64/boot/dts/exynos/exynos2200.dtsi | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/exynos/exynos2200.dtsi b/arch/arm64/boot/dts/exynos/exynos2200.dtsi index 933ab7818ab2..6487ccb58ae7 100644 --- a/arch/arm64/boot/dts/exynos/exynos2200.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos2200.dtsi @@ -274,6 +274,7 @@ reg = <0x10200000 0x10000>, /* GICD */ <0x10240000 0x200000>; /* GICR * 8 */ + #address-cells = <0>; #interrupt-cells = <4>; interrupt-controller; interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH 0>; |