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authorFrank Li <Frank.Li@nxp.com>2026-07-09 16:29:45 -0400
committerFrank Li <Frank.Li@nxp.com>2026-07-20 12:51:56 -0400
commit617bcacbf0905d2ac25c1fe6d2ab45afc4f9fc3c (patch)
tree957282974b962bed340ce42dfb6f7c2a0ffa3990
parentf57bf4c11d7fa95afaea45a14d91b067406c60f0 (diff)
downloadlinux-617bcacbf0905d2ac25c1fe6d2ab45afc4f9fc3c.tar.gz
linux-617bcacbf0905d2ac25c1fe6d2ab45afc4f9fc3c.zip
arm64: dts: imx8qm-ss-lsio: add lsio mu8 and mu8b
Add mu8 and mu8b mailbox nodes. Signed-off-by: Frank Li <Frank.Li@nxp.com>
-rw-r--r--arch/arm64/boot/dts/freescale/imx8qm-ss-lsio.dtsi21
1 files changed, 21 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8qm-ss-lsio.dtsi b/arch/arm64/boot/dts/freescale/imx8qm-ss-lsio.dtsi
index b483134f84d1..e055d41f77cb 100644
--- a/arch/arm64/boot/dts/freescale/imx8qm-ss-lsio.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8qm-ss-lsio.dtsi
@@ -3,6 +3,27 @@
* Copyright 2019-2020 NXP
* Dong Aisheng <aisheng.dong@nxp.com>
*/
+&lsio_subsys {
+ lsio_mu8: mailbox@5d230000 {
+ compatible = "fsl,imx8qm-mu", "fsl,imx6sx-mu";
+ reg = <0x5d230000 0x10000>;
+ interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
+ #mbox-cells = <2>;
+ power-domains = <&pd IMX_SC_R_MU_8A>;
+ status = "disabled";
+ };
+
+ lsio_mu8b: mailbox@5d2c0000 {
+ compatible = "fsl,imx8qm-mu", "fsl,imx6sx-mu";
+ reg = <0x5d2c0000 0x10000>;
+ interrupts = <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>;
+ #mbox-cells = <2>;
+ fsl,mu-side-b;
+ power-domains = <&pd IMX_SC_R_MU_8B>;
+ status = "disabled";
+ };
+
+};
&lsio_gpio0 {
compatible = "fsl,imx8qm-gpio", "fsl,imx35-gpio";