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| author | Francesco Dolcini <francesco.dolcini@toradex.com> | 2026-04-09 11:58:48 +0200 |
|---|---|---|
| committer | Frank Li <Frank.Li@nxp.com> | 2026-05-19 14:13:57 -0400 |
| commit | 64819436679b7991d17fe498539b41eb2aacd05b (patch) | |
| tree | 1b6400f743e1995ea124f479dc2d607bde97a1af | |
| parent | ca6371cdd9cf3c0d40f05a3ea6494646eaefb15c (diff) | |
| download | linux-64819436679b7991d17fe498539b41eb2aacd05b.tar.gz linux-64819436679b7991d17fe498539b41eb2aacd05b.zip | |
arm64: dts: freescale: imx8mm-verdin: Split UART_2 pinctrl group
Some carrier board reuse the UART_2 control signals as GPIO, split
the pinctrl RTS/CTS in separated nodes to maximize flexibility.
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Signed-off-by: Frank Li <Frank.Li@nxp.com>
| -rw-r--r-- | arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi | 16 |
1 files changed, 12 insertions, 4 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi index 1594ce9182a5..5fc177f589cb 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi @@ -735,7 +735,7 @@ /* Verdin UART_2 */ &uart3 { pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart3>; + pinctrl-0 = <&pinctrl_uart3>, <&pinctrl_uart3_cts>, <&pinctrl_uart3_rts>; uart-has-rtscts; }; @@ -1144,12 +1144,20 @@ <MX8MM_IOMUXC_SAI3_TXFS_UART2_DCE_RX 0x146>; /* SODIMM 129 */ }; + pinctrl_uart3_cts: uart3ctsgrp { + fsl,pins = + <MX8MM_IOMUXC_ECSPI1_SS0_UART3_DCE_RTS_B 0x146>; /* SODIMM 143 */ + }; + + pinctrl_uart3_rts: uart3rtsgrp { + fsl,pins = + <MX8MM_IOMUXC_ECSPI1_MISO_UART3_DCE_CTS_B 0x146>; /* SODIMM 141 */ + }; + pinctrl_uart3: uart3grp { fsl,pins = - <MX8MM_IOMUXC_ECSPI1_MISO_UART3_DCE_CTS_B 0x146>, /* SODIMM 141 */ <MX8MM_IOMUXC_ECSPI1_MOSI_UART3_DCE_TX 0x146>, /* SODIMM 139 */ - <MX8MM_IOMUXC_ECSPI1_SCLK_UART3_DCE_RX 0x146>, /* SODIMM 137 */ - <MX8MM_IOMUXC_ECSPI1_SS0_UART3_DCE_RTS_B 0x146>; /* SODIMM 143 */ + <MX8MM_IOMUXC_ECSPI1_SCLK_UART3_DCE_RX 0x146>; /* SODIMM 137 */ }; pinctrl_uart4: uart4grp { |