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authorPiotr Wojtaszczyk <piotr.wojtaszczyk@timesys.com>2025-12-31 23:57:52 +0200
committerVladimir Zapolskiy <vz@mleia.com>2026-01-09 09:53:17 +0200
commit6b7e0f1c2a3eb66f561fdc5643752b190692e5cd (patch)
treea210d1bb8a6e350805ebf1716f35ced1863535a3
parent8754c6e19b902416816057bcf38af8af52a91103 (diff)
downloadlinux-6b7e0f1c2a3eb66f561fdc5643752b190692e5cd.tar.gz
linux-6b7e0f1c2a3eb66f561fdc5643752b190692e5cd.zip
ARM: dts: lpc32xx: Add missing DMA properties
Add properties declared in the new DT binding nxp,lpc3220-dmamux.yaml and corresponding phandles. [vzapolskiy]: 1. rebased the change, 2. dmamux unit address shall be 0x78 instead of 0x7c, 3. removed unsupported 'dmas' properties from sd, ssp0, ssp1 and HS UARTs, 4. more non-functional updates by reordering properies, 5. minor updates to the commit message. Link to the original change: * https://lore.kernel.org/linux-arm-kernel/20240627150046.258795-6-piotr.wojtaszczyk@timesys.com/ Signed-off-by: Piotr Wojtaszczyk <piotr.wojtaszczyk@timesys.com> Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
-rw-r--r--arch/arm/boot/dts/nxp/lpc/lpc32xx.dtsi25
1 files changed, 25 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/nxp/lpc/lpc32xx.dtsi b/arch/arm/boot/dts/nxp/lpc/lpc32xx.dtsi
index e44917324aed..58d21f42ea4c 100644
--- a/arch/arm/boot/dts/nxp/lpc/lpc32xx.dtsi
+++ b/arch/arm/boot/dts/nxp/lpc/lpc32xx.dtsi
@@ -67,6 +67,8 @@
reg = <0x20020000 0x1000>;
interrupts = <11 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk LPC32XX_CLK_SLC>;
+ dmas = <&dma 1 1>;
+ dma-names = "rx-tx";
status = "disabled";
};
@@ -75,6 +77,8 @@
reg = <0x200a8000 0x11000>;
interrupts = <11 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk LPC32XX_CLK_MLC>;
+ dmas = <&dma 12 1>;
+ dma-names = "rx-tx";
status = "disabled";
};
@@ -84,6 +88,12 @@
interrupts = <28 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk LPC32XX_CLK_DMA>;
clock-names = "apb_pclk";
+ dma-channels = <8>;
+ dma-requests = <16>;
+ lli-bus-interface-ahb1;
+ mem-bus-interface-ahb1;
+ memcpy-burst-size = <256>;
+ memcpy-bus-width = <32>;
#dma-cells = <2>;
};
@@ -184,6 +194,8 @@
compatible = "nxp,lpc3220-spi";
reg = <0x20088000 0x1000>;
clocks = <&clk LPC32XX_CLK_SPI1>;
+ dmas = <&dmamux 11 1 0>;
+ dma-names = "rx-tx";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
@@ -208,6 +220,8 @@
compatible = "nxp,lpc3220-spi";
reg = <0x20090000 0x1000>;
clocks = <&clk LPC32XX_CLK_SPI2>;
+ dmas = <&dmamux 3 1 0>;
+ dma-names = "rx-tx";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
@@ -216,6 +230,8 @@
i2s0: i2s@20094000 {
compatible = "nxp,lpc3220-i2s";
reg = <0x20094000 0x1000>;
+ dmas = <&dma 0 1>, <&dma 13 1>;
+ dma-names = "rx", "tx";
status = "disabled";
};
@@ -232,6 +248,8 @@
i2s1: i2s@2009c000 {
compatible = "nxp,lpc3220-i2s";
reg = <0x2009c000 0x1000>;
+ dmas = <&dma 2 1>, <&dmamux 10 1 1>;
+ dma-names = "rx", "tx";
status = "disabled";
};
@@ -322,6 +340,13 @@
clocks = <&xtal_32k>, <&xtal>;
clock-names = "xtal_32k", "xtal";
};
+
+ dmamux: dma-router@78 {
+ compatible = "nxp,lpc3220-dmamux";
+ reg = <0x78 0x8>;
+ dma-masters = <&dma>;
+ #dma-cells = <3>;
+ };
};
mic: interrupt-controller@40008000 {