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| author | Geert Uytterhoeven <geert+renesas@glider.be> | 2026-04-27 11:51:11 +0200 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2026-04-27 11:51:11 +0200 |
| commit | 70f479cbbf248df86f4a6085b83ac8f04cdc444f (patch) | |
| tree | 01d0a7c0c809ac389a3c748dbf1012d3101a0528 | |
| parent | 38acb2a1a0ced15f61342347bba8aa57775802ea (diff) | |
| parent | c9c008754abd66d48cb04a9045cc12714ce2d720 (diff) | |
| download | linux-70f479cbbf248df86f4a6085b83ac8f04cdc444f.tar.gz linux-70f479cbbf248df86f4a6085b83ac8f04cdc444f.zip | |
Merge tag 'renesas-r8a7740-dt-binding-defs-tag1' into renesas-clk-for-v7.2
Renesas R-Mobile A1 Coresight Clock DT Binding Definitions
ZT trace bus and ZTR trace clock DT binding definitions for the Renesas
R-Mobile A1 (R8A7740) SoC, shared by driver and DT source files.
| -rw-r--r-- | Documentation/devicetree/bindings/clock/renesas,cpg-clocks.yaml | 6 | ||||
| -rw-r--r-- | include/dt-bindings/clock/r8a7740-clock.h | 2 |
2 files changed, 6 insertions, 2 deletions
diff --git a/Documentation/devicetree/bindings/clock/renesas,cpg-clocks.yaml b/Documentation/devicetree/bindings/clock/renesas,cpg-clocks.yaml index a0e09b7002f0..925ed35d6658 100644 --- a/Documentation/devicetree/bindings/clock/renesas,cpg-clocks.yaml +++ b/Documentation/devicetree/bindings/clock/renesas,cpg-clocks.yaml @@ -41,7 +41,7 @@ properties: clock-output-names: minItems: 3 - maxItems: 17 + maxItems: 19 renesas,mode: description: Board-specific settings of the MD_CK* bits on R-Mobile A1 @@ -123,6 +123,8 @@ allOf: - const: zb - const: m3 - const: cp + - const: ztr + - const: zt required: - renesas,mode @@ -240,6 +242,6 @@ examples: #clock-cells = <1>; clock-output-names = "system", "pllc0", "pllc1", "pllc2", "r", "usb24s", "i", "zg", "b", "m1", "hp", "hpp", - "usbp", "s", "zb", "m3", "cp"; + "usbp", "s", "zb", "m3", "cp", "ztr", "zt"; renesas,mode = <0x05>; }; diff --git a/include/dt-bindings/clock/r8a7740-clock.h b/include/dt-bindings/clock/r8a7740-clock.h index 1b3fdb39cc42..8a8816b2ff6a 100644 --- a/include/dt-bindings/clock/r8a7740-clock.h +++ b/include/dt-bindings/clock/r8a7740-clock.h @@ -24,6 +24,8 @@ #define R8A7740_CLK_ZB 14 #define R8A7740_CLK_M3 15 #define R8A7740_CLK_CP 16 +#define R8A7740_CLK_ZTR 17 +#define R8A7740_CLK_ZT 18 /* MSTP1 */ #define R8A7740_CLK_CEU21 28 |