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| author | Vladimir Zapolskiy <vz@mleia.com> | 2025-12-29 00:49:07 +0200 |
|---|---|---|
| committer | Vladimir Zapolskiy <vz@mleia.com> | 2026-01-10 03:47:36 +0200 |
| commit | 71630e581a0e34c03757f5c1706f57c853b92555 (patch) | |
| tree | 19520e8a3cdc6341ff9be418ac532d72e4e17f94 | |
| parent | c23ac0f9325ee5b3755ff9b7c3143fed7bbaebd8 (diff) | |
| download | linux-71630e581a0e34c03757f5c1706f57c853b92555.tar.gz linux-71630e581a0e34c03757f5c1706f57c853b92555.zip | |
arm: dts: lpc32xx: add clocks property to Motor Control PWM device tree node
Motor Control PWM depends on its own supply clock, the clock gate control
is present in TIMCLK_CTRL1 register.
Fixes: b7d41c937ed7 ("ARM: LPC32xx: Add the motor PWM to base dts file")
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
| -rw-r--r-- | arch/arm/boot/dts/nxp/lpc/lpc32xx.dtsi | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/nxp/lpc/lpc32xx.dtsi b/arch/arm/boot/dts/nxp/lpc/lpc32xx.dtsi index e89ef62f9fbb..7fa91d1ac9ea 100644 --- a/arch/arm/boot/dts/nxp/lpc/lpc32xx.dtsi +++ b/arch/arm/boot/dts/nxp/lpc/lpc32xx.dtsi @@ -322,6 +322,7 @@ mpwm: pwm@400e8000 { compatible = "nxp,lpc3220-motor-pwm"; reg = <0x400e8000 0x78>; + clocks = <&clk LPC32XX_CLK_MCPWM>; #pwm-cells = <3>; status = "disabled"; }; |