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| author | Jun Guo <jun.guo@cixtech.com> | 2025-09-19 09:31:18 +0800 |
|---|---|---|
| committer | Peter Chen <peter.chen@cixtech.com> | 2025-11-06 19:26:53 +0800 |
| commit | 74178bb23c6bdca547c8c6bad89f3338f1af89be (patch) | |
| tree | dc09ecba83f0eec8d721787fea6200681da50869 | |
| parent | 211ddde0823f1442e4ad052a2f30f050145ccada (diff) | |
| download | linux-74178bb23c6bdca547c8c6bad89f3338f1af89be.tar.gz linux-74178bb23c6bdca547c8c6bad89f3338f1af89be.zip | |
arm64: dts: cix: add DT nodes for SPI
Add the device tree node for the spi controller of the CIX SKY1 SoC.
Signed-off-by: Jun Guo <jun.guo@cixtech.com>
Link: https://lore.kernel.org/r/20250919013118.853078-1-jun.guo@cixtech.com
Signed-off-by: Peter Chen <peter.chen@cixtech.com>
| -rw-r--r-- | arch/arm64/boot/dts/cix/sky1.dtsi | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/cix/sky1.dtsi b/arch/arm64/boot/dts/cix/sky1.dtsi index 2fb2c99c0796..ea324336bf34 100644 --- a/arch/arm64/boot/dts/cix/sky1.dtsi +++ b/arch/arm64/boot/dts/cix/sky1.dtsi @@ -264,6 +264,26 @@ status = "disabled"; }; + spi0: spi@4090000 { + compatible = "cdns,spi-r1p6"; + reg = <0x0 0x04090000 0x0 0x10000>; + clocks = <&scmi_clk CLK_TREE_FCH_SPI0_APB>, + <&scmi_clk CLK_TREE_FCH_SPI0_APB>; + clock-names = "ref_clk", "pclk"; + interrupts = <GIC_SPI 294 IRQ_TYPE_LEVEL_HIGH 0>; + status = "disabled"; + }; + + spi1: spi@40a0000 { + compatible = "cdns,spi-r1p6"; + reg = <0x0 0x040a0000 0x0 0x10000>; + clocks = <&scmi_clk CLK_TREE_FCH_SPI1_APB>, + <&scmi_clk CLK_TREE_FCH_SPI1_APB>; + clock-names = "ref_clk", "pclk"; + interrupts = <GIC_SPI 295 IRQ_TYPE_LEVEL_HIGH 0>; + status = "disabled"; + }; + uart0: serial@40b0000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x0 0x040b0000 0x0 0x1000>; |