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| author | Lijuan Gao <quic_lijuang@quicinc.com> | 2024-12-19 15:59:47 +0800 |
|---|---|---|
| committer | Bjorn Andersson <andersson@kernel.org> | 2025-01-06 18:09:28 -0600 |
| commit | 80c82827327d80bde8fc96ebd4e637d0454062db (patch) | |
| tree | 77b93872970d10706ddb9e3dbac6564bf80ffdd8 | |
| parent | 4bb53051c92448537ad4cf194f6cd19556a843aa (diff) | |
| download | linux-80c82827327d80bde8fc96ebd4e637d0454062db.tar.gz linux-80c82827327d80bde8fc96ebd4e637d0454062db.zip | |
arm64: dts: qcom: correct gpio-ranges for QCS615
Correct the gpio-ranges for the QCS615 TLMM pin controller to include
GPIOs 0-122 and the UFS_RESET pin for primary UFS memory reset.
Fixes: 8e266654a2fe ("arm64: dts: qcom: add QCS615 platform")
Signed-off-by: Lijuan Gao <quic_lijuang@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20241219-correct_gpio_ranges-v2-5-19af8588dbd0@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
| -rw-r--r-- | arch/arm64/boot/dts/qcom/qcs615.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/qcom/qcs615.dtsi b/arch/arm64/boot/dts/qcom/qcs615.dtsi index 84a378487dce..6f87e3072069 100644 --- a/arch/arm64/boot/dts/qcom/qcs615.dtsi +++ b/arch/arm64/boot/dts/qcom/qcs615.dtsi @@ -938,7 +938,7 @@ "west", "south"; interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>; - gpio-ranges = <&tlmm 0 0 123>; + gpio-ranges = <&tlmm 0 0 124>; gpio-controller; #gpio-cells = <2>; interrupt-controller; |