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authorAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>2025-02-12 11:00:06 +0100
committerAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>2025-03-06 11:54:19 +0100
commit881d5094b138d002aab14922d41ec2058b9570c7 (patch)
tree66a41ff23181e77e49f7c80c937e07f42773d1d2
parent694e0b7c1747603243da874de9cbbf8cb806ca44 (diff)
downloadlinux-881d5094b138d002aab14922d41ec2058b9570c7.tar.gz
linux-881d5094b138d002aab14922d41ec2058b9570c7.zip
soc: mediatek: mtk-mmsys: Fix MT8188 VDO1 DPI1 output selection
The VDO1_MERGE4 hardware (merge5 software component) should be set to enable output to DPI1_SEL by setting BIT(2) but, despite the intention being exactly that, this won't work because the declared register mask is wrong as it is set as GENMASK(1, 0). Register MERGE4_MOUT_EN in VDO1 has four used bits [3, 0] so fix the mask to reflect that. That, in turn, allows the mmsys driver to actually set BIT(2) in this register, fixing the MERGE4 output to DPI1 selection. Fixes: c0349314d5a0 ("soc: mediatek: Support MT8188 VDOSYS1 in mtk-mmsys") Link: https://lore.kernel.org/r/20250212100012.33001-3-angelogioacchino.delregno@collabora.com Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
-rw-r--r--drivers/soc/mediatek/mt8188-mmsys.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/soc/mediatek/mt8188-mmsys.h b/drivers/soc/mediatek/mt8188-mmsys.h
index 6bebf1a69fc0..a1d63be0a73d 100644
--- a/drivers/soc/mediatek/mt8188-mmsys.h
+++ b/drivers/soc/mediatek/mt8188-mmsys.h
@@ -343,7 +343,7 @@ static const struct mtk_mmsys_routes mmsys_mt8188_vdo1_routing_table[] = {
MT8188_DISP_DPI1_SEL_IN_FROM_VPP_MERGE4_MOUT
}, {
DDP_COMPONENT_MERGE5, DDP_COMPONENT_DPI1,
- MT8188_VDO1_MERGE4_SOUT_SEL, GENMASK(1, 0),
+ MT8188_VDO1_MERGE4_SOUT_SEL, GENMASK(3, 0),
MT8188_MERGE4_SOUT_TO_DPI1_SEL
}, {
DDP_COMPONENT_MERGE5, DDP_COMPONENT_DP_INTF1,