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| author | Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> | 2025-08-20 21:06:51 +0100 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2025-09-04 11:37:37 +0200 |
| commit | 965e37ec0f8d4926809526e5ee0916774376f007 (patch) | |
| tree | be5725be67b80c7ecdd8b2220a1de5a221cf06fd | |
| parent | 115b557b6f61ca279a4754b20b8686039fdb5234 (diff) | |
| download | linux-965e37ec0f8d4926809526e5ee0916774376f007.tar.gz linux-965e37ec0f8d4926809526e5ee0916774376f007.zip | |
arm64: dts: renesas: r9a09g087: Add pinctrl node
Add pinctrl node to RZ/N2H ("R9A09G087") SoC DTSI.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250820200659.2048755-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
| -rw-r--r-- | arch/arm64/boot/dts/renesas/r9a09g087.dtsi | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/renesas/r9a09g087.dtsi b/arch/arm64/boot/dts/renesas/r9a09g087.dtsi index 7dcaee711486..ecbb7b93aed2 100644 --- a/arch/arm64/boot/dts/renesas/r9a09g087.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a09g087.dtsi @@ -216,6 +216,19 @@ #power-domain-cells = <0>; }; + pinctrl: pinctrl@802c0000 { + compatible = "renesas,r9a09g087-pinctrl"; + reg = <0 0x802c0000 0 0x10000>, + <0 0x812c0000 0 0x10000>, + <0 0x802b0000 0 0x10000>; + reg-names = "nsr", "srs", "srn"; + clocks = <&cpg CPG_CORE R9A09G087_CLK_PCLKM>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pinctrl 0 0 280>; + power-domains = <&cpg>; + }; + gic: interrupt-controller@83000000 { compatible = "arm,gic-v3"; reg = <0x0 0x83000000 0 0x40000>, |