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| author | Siddharth Vadapalli <s-vadapalli@ti.com> | 2025-04-22 18:02:17 +0530 |
|---|---|---|
| committer | Nishanth Menon <nm@ti.com> | 2025-05-02 08:29:53 -0500 |
| commit | 9bfebd8750a06f5f8bf16ac58eb7deb638686d07 (patch) | |
| tree | 89407b4b3cbf8f7eeb78f7e5f40f9d64e06ded86 | |
| parent | b1f9ec6545c6423e106f0aeddc3b8651b5ad116c (diff) | |
| download | linux-9bfebd8750a06f5f8bf16ac58eb7deb638686d07.tar.gz linux-9bfebd8750a06f5f8bf16ac58eb7deb638686d07.zip | |
arm64: dts: ti: k3-j784s4-j742s2-main-common: Add ACSPCIE0 node
The ACSPCIE0 module on TI's J784S4 SoC is capable of driving the
reference clock required by the PCIe Endpoint device. It is an
alternative to on-board and external reference clock generators.
Add the device-tree node for the same.
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Link: https://lore.kernel.org/r/20250422123218.3788223-2-s-vadapalli@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
| -rw-r--r-- | arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi index 484f8e6930ab..363d68fec387 100644 --- a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi @@ -126,6 +126,11 @@ assigned-clock-parents = <&k3_clks 157 63>; #clock-cells = <0>; }; + + acspcie0_proxy_ctrl: clock-controller@1a090 { + compatible = "ti,j784s4-acspcie-proxy-ctrl", "syscon"; + reg = <0x1a090 0x4>; + }; }; main_ehrpwm0: pwm@3000000 { |