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| author | Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com> | 2023-10-18 17:06:22 +0530 |
|---|---|---|
| committer | Mika Kahola <mika.kahola@intel.com> | 2023-10-30 11:02:55 +0200 |
| commit | a3431650f30a94b179d419ef87c21213655c28cd (patch) | |
| tree | d160c061f35c2eaaa5b4b42d5a1f430202f8bedb | |
| parent | 0a0f7935740853ce2654a7750b84c3bd34756979 (diff) | |
| download | linux-a3431650f30a94b179d419ef87c21213655c28cd.tar.gz linux-a3431650f30a94b179d419ef87c21213655c28cd.zip | |
drm/i915/mtl: Support HBR3 rate with C10 phy and eDP in MTL
eDP specification supports HBR3 link rate since v1.4a. Moreover,
C10 phy can support HBR3 link rate for both DP and eDP. Therefore,
do not clamp the supported rates for eDP at 6.75Gbps.
Cc: <stable@vger.kernel.org>
BSpec: 70073 74224
Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231018113622.2761997-1-chaitanya.kumar.borah@intel.com
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_dp.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 2fc0a17c45c7..ab4608dafe5d 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -430,7 +430,7 @@ static int mtl_max_source_rate(struct intel_dp *intel_dp) enum phy phy = intel_port_to_phy(i915, dig_port->base.port); if (intel_is_c10phy(i915, phy)) - return intel_dp_is_edp(intel_dp) ? 675000 : 810000; + return 810000; return 2000000; } |