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| author | Feifei Xu <Feifei.Xu@amd.com> | 2026-05-15 14:48:50 +0800 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2026-06-03 13:49:24 -0400 |
| commit | c04b0430a9b9291ac2ad23a46cd6216c7ef8964f (patch) | |
| tree | 768bb0e2cce93f0acd69e6f9a7e9c8f339eee2ef | |
| parent | e0a3aa8a6750e8cf067fe2146dc618ffd296d5ef (diff) | |
| download | linux-c04b0430a9b9291ac2ad23a46cd6216c7ef8964f.tar.gz linux-c04b0430a9b9291ac2ad23a46cd6216c7ef8964f.zip | |
drm/amdgpu: fix shift-out-bounds warning of number_instance
Clamp number_instance using BIT/BIT_ULL with the <32 check to avoid the
shift-out-bounds warning.
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Le Ma <le.ma@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 40 |
1 files changed, 21 insertions, 19 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c index b52c9fcf3fc5..340f4c823673 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c @@ -840,42 +840,44 @@ static void amdgpu_discovery_read_from_harvest_table(struct amdgpu_device *adev, harvest_info = (struct harvest_table *)(discovery_bin + offset); for (i = 0; i < 32; i++) { - if (le16_to_cpu(harvest_info->list[i].hw_id) == 0) + u16 hw_id = le16_to_cpu(harvest_info->list[i].hw_id); + u8 inst = harvest_info->list[i].number_instance; + + if (hw_id == 0) break; - switch (le16_to_cpu(harvest_info->list[i].hw_id)) { + if (inst >= 32) { + dev_warn(adev->dev, + "bogus harvest instance %u for hw_id %u\n", + inst, hw_id); + continue; + } + + switch (hw_id) { case VCN_HWID: (*vcn_harvest_count)++; - adev->vcn.harvest_config |= - (1 << harvest_info->list[i].number_instance); - adev->jpeg.harvest_config |= - (1 << harvest_info->list[i].number_instance); - - adev->vcn.inst_mask &= - ~(1U << harvest_info->list[i].number_instance); - adev->jpeg.inst_mask &= - ~(1U << harvest_info->list[i].number_instance); + adev->vcn.harvest_config |= BIT(inst); + adev->jpeg.harvest_config |= BIT(inst); + + adev->vcn.inst_mask &= ~BIT(inst); + adev->jpeg.inst_mask &= ~BIT(inst); break; case DMU_HWID: adev->harvest_ip_mask |= AMD_HARVEST_IP_DMU_MASK; break; case UMC_HWID: - umc_harvest_config |= - 1 << (le16_to_cpu(harvest_info->list[i].number_instance)); + umc_harvest_config |= BIT_ULL(inst); (*umc_harvest_count)++; break; case GC_HWID: - adev->gfx.xcc_mask &= - ~(1U << harvest_info->list[i].number_instance); + adev->gfx.xcc_mask &= ~BIT(inst); break; case SDMA0_HWID: - adev->sdma.sdma_mask &= - ~(1U << harvest_info->list[i].number_instance); + adev->sdma.sdma_mask &= ~BIT(inst); break; #if defined(CONFIG_DRM_AMD_ISP) case ISP_HWID: - adev->isp.harvest_config |= - ~(1U << harvest_info->list[i].number_instance); + adev->isp.harvest_config |= ~BIT(inst); break; #endif default: |