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| author | Jinyu Tang <tjytimi@163.com> | 2026-05-17 23:34:26 +0800 |
|---|---|---|
| committer | Anup Patel <anup@brainfault.org> | 2026-06-03 18:20:01 +0530 |
| commit | d7a26a0ba71542c9778d7d802dc79b0874f852bf (patch) | |
| tree | 0e4adaeb432f4318bd9edb2c82be203cbfcb2328 | |
| parent | 7dd416fdd3fba2095c3cea58e36f8ee5d86dadc3 (diff) | |
| download | linux-d7a26a0ba71542c9778d7d802dc79b0874f852bf.tar.gz linux-d7a26a0ba71542c9778d7d802dc79b0874f852bf.zip | |
KVM: riscv: Update G-stage PTE permissions atomically
When a fault hits an existing G-stage leaf with the same PFN, KVM only
needs to update the PTE permissions. This path will be used by read-side
fault handling, so it must not overwrite a concurrent PTE update.
Use the cmpxchg helper when relaxing permissions on an existing leaf,
following the same concurrency model used by x86 for atomic SPTE
permission updates. Retry if another CPU changed the PTE first, and use
cpu_relax() while spinning.
Signed-off-by: Jinyu Tang <tjytimi@163.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Link: https://lore.kernel.org/r/20260517153427.94889-5-tjytimi@163.com
Signed-off-by: Anup Patel <anup@brainfault.org>
| -rw-r--r-- | arch/riscv/kvm/gstage.c | 19 |
1 files changed, 12 insertions, 7 deletions
diff --git a/arch/riscv/kvm/gstage.c b/arch/riscv/kvm/gstage.c index d878100aeb35..b83b85d1c016 100644 --- a/arch/riscv/kvm/gstage.c +++ b/arch/riscv/kvm/gstage.c @@ -182,17 +182,22 @@ int kvm_riscv_gstage_set_pte(struct kvm_gstage *gstage, static void kvm_riscv_gstage_update_pte_prot(struct kvm_gstage *gstage, u32 level, gpa_t addr, pte_t *ptep, pgprot_t prot) { - pte_t new_pte; + pte_t old_pte, new_pte; - if (pgprot_val(pte_pgprot(ptep_get(ptep))) == pgprot_val(prot)) - return; + for (;;) { + old_pte = ptep_get(ptep); + if (pgprot_val(pte_pgprot(old_pte)) == pgprot_val(prot)) + return; - new_pte = pfn_pte(pte_pfn(ptep_get(ptep)), prot); - new_pte = pte_mkdirty(new_pte); + new_pte = pfn_pte(pte_pfn(old_pte), prot); + new_pte = pte_mkdirty(new_pte); - set_pte(ptep, new_pte); + if (kvm_riscv_gstage_try_update_pte(gstage, level, addr, ptep, + old_pte, new_pte)) + return; - gstage_tlb_flush(gstage, level, addr); + cpu_relax(); + } } int kvm_riscv_gstage_map_page(struct kvm_gstage *gstage, |