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| author | Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> | 2026-08-07 01:05:46 +0300 |
|---|---|---|
| committer | Linus Walleij <linusw@kernel.org> | 2026-08-07 20:39:47 +0200 |
| commit | da64ec8b4d3f6d3c2f61590b1264f8901bc37d45 (patch) | |
| tree | 9c0339998bb7a5b7688ec22248512befb51d5332 | |
| parent | 739bc85aed14b739dca5b7aff4241b778af80220 (diff) | |
| download | linux-da64ec8b4d3f6d3c2f61590b1264f8901bc37d45.tar.gz linux-da64ec8b4d3f6d3c2f61590b1264f8901bc37d45.zip | |
dt-bindings: pinctrl: airoha: an7583: allow configuration of non-gpio default pins as gpio and pwm
Some AN7583 pins have non-gpio default settings. This patch provides a way
to configure such pins as GPIO or PWM. Also add gpio-range property in the
dts example.
Please note that gpio52 pin can't be configured as PWM pin.
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Linus Walleij <linusw@kernel.org>
| -rw-r--r-- | Documentation/devicetree/bindings/pinctrl/airoha,an7583-pinctrl.yaml | 16 |
1 files changed, 14 insertions, 2 deletions
diff --git a/Documentation/devicetree/bindings/pinctrl/airoha,an7583-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/airoha,an7583-pinctrl.yaml index f52802a3ad79..3e680c997fe2 100644 --- a/Documentation/devicetree/bindings/pinctrl/airoha,an7583-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/airoha,an7583-pinctrl.yaml @@ -61,7 +61,7 @@ patternProperties: description: A string containing the name of the function to mux to the group. enum: [pon, tod_1pps, sipo, mdio, uart, i2c, jtag, pcm, spi, - pcm_spi, emmc, pnand, pcie_reset, pwm, phy1_led0, + pcm_spi, emmc, pnand, gpio, pcie_reset, pwm, phy1_led0, phy2_led0, phy3_led0, phy4_led0, phy1_led1, phy2_led1, phy3_led1, phy4_led1] @@ -180,6 +180,16 @@ patternProperties: - if: properties: function: + const: gpio + then: + properties: + groups: + enum: [gpio39, gpio40, gpio41, gpio42, gpio43, gpio44, + gpio45, gpio46, gpio47, gpio48, gpio49, gpio50, + gpio51, gpio52] + - if: + properties: + function: const: pcie_reset then: properties: @@ -199,7 +209,7 @@ patternProperties: gpio26, gpio27, gpio28, gpio29, gpio30, gpio31, gpio36, gpio37, gpio38, gpio39, gpio40, gpio41, gpio42, gpio43, gpio44, gpio45, gpio46, gpio47, - gpio48] + gpio48, gpio49, gpio50, gpio51] - if: properties: function: @@ -337,6 +347,8 @@ examples: interrupt-controller; #interrupt-cells = <2>; + gpio-ranges = <&pinctrl 0 2 53>; + pcie1-rst-pins { conf { pins = "pcie_reset1"; |