drm/amd/display: Add DRAM table fields to clk_mgr_internal

[Why]
Add GPU-accessible DRAM buffer fields for bulk data
transfer from PMFW during clock manager initialization.

[How]
Add dal_init_table and dal_init_table_addr fields to
struct clk_mgr_internal for TABLE_DAL_INIT DRAM transfer.

Reviewed-by: Alvin Lee <alvin.lee2@amd.com>
Signed-off-by: Wenjing Liu <wenjing.liu@amd.com>
Signed-off-by: Ray Wu <ray.wu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

1 files changed, 11 insertions, 0 deletions

diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr_internal.h b/drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr_internal.h
index 450bce3d8e02..6ed1011457de 100644
--- a/drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr_internal.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr_internal.h
@@ -477,6 +477,17 @@ struct clk_mgr_internal {
 	void *wm_range_table;
 	long long wm_range_table_addr;
 
+	/**
+	 * @dal_init_table:
+	 *
+	 * GPU-accessible DRAM buffer for the DAL init table transferred
+	 * from PMFW via DALSMC_MSG_TransferTableSmu2Dram(TABLE_DAL_INIT).
+	 * Contains all static PMFW data needed at init: DPM clock tables,
+	 * UTM QoS parameters, and memory configuration.
+	 */
+	const void *dal_init_table;
+	long long dal_init_table_addr;
+
 	bool dpm_present;
 	bool pme_trigger_pending;
 };