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| author | John Madieu <john.madieu.xa@bp.renesas.com> | 2026-03-06 15:34:13 +0100 |
|---|---|---|
| committer | Manivannan Sadhasivam <mani@kernel.org> | 2026-03-15 21:04:54 +0530 |
| commit | fabce18494e5a4f388c70a40fa8351c911790d8d (patch) | |
| tree | 6fbea10535494ba647544a8d36a5c9b5717e0cdc | |
| parent | bb1b0f47f6822864c1689f46348efa42c5d4074c (diff) | |
| download | linux-fabce18494e5a4f388c70a40fa8351c911790d8d.tar.gz linux-fabce18494e5a4f388c70a40fa8351c911790d8d.zip | |
dt-bindings: PCI: renesas,r9a08g045s33-pcie: Document RZ/G3E SoC
Extend the existing device tree bindings for Renesas RZ/G3S PCIe
controller to include support for the RZ/G3E (renesas,r9a09g047e57-pcie)
PCIe controller. The RZ/G3E PCIe controller is similar to RZ/G3S but has
some key differences:
- Uses a different device ID
- Supports PCIe Gen3 (8.0 GT/s) link speeds
- Uses a different clock naming (clkpmu vs clkl1pm)
- Has a different set of interrupts, interrupt ordering, and reset
signals
Add device tree bindings for renesas,r9a09g047e57-pcie compatible IPs.
Signed-off-by: John Madieu <john.madieu.xa@bp.renesas.com>
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
Tested-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> # RZ/V2N EVK
Tested-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Link: https://patch.msgid.link/20260306143423.19562-7-john.madieu.xa@bp.renesas.com
| -rw-r--r-- | Documentation/devicetree/bindings/pci/renesas,r9a08g045-pcie.yaml | 73 |
1 files changed, 67 insertions, 6 deletions
diff --git a/Documentation/devicetree/bindings/pci/renesas,r9a08g045-pcie.yaml b/Documentation/devicetree/bindings/pci/renesas,r9a08g045-pcie.yaml index d1eb92995e2c..a67108c48feb 100644 --- a/Documentation/devicetree/bindings/pci/renesas,r9a08g045-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/renesas,r9a08g045-pcie.yaml @@ -10,17 +10,21 @@ maintainers: - Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> description: - Renesas RZ/G3S PCIe host controller complies with PCIe Base Specification - 4.0 and supports up to 5 GT/s (Gen2). + Renesas RZ/G3{E,S} PCIe host controllers comply with PCIe + Base Specification 4.0 and support up to 5 GT/s (Gen2) for RZ/G3S and + up to 8 GT/s (Gen3) for RZ/G3E. properties: compatible: - const: renesas,r9a08g045-pcie # RZ/G3S + enum: + - renesas,r9a08g045-pcie # RZ/G3S + - renesas,r9a09g047-pcie # RZ/G3E reg: maxItems: 1 interrupts: + minItems: 16 items: - description: System error interrupt - description: System error on correctable error interrupt @@ -38,8 +42,16 @@ properties: - description: PCIe event interrupt - description: Message interrupt - description: All interrupts + - description: Link equalization request interrupt + - description: Turn off event interrupt + - description: PMU power off interrupt + - description: D3 event function 0 interrupt + - description: D3 event function 1 interrupt + - description: Configuration PMCSR write clear function 0 interrupt + - description: Configuration PMCSR write clear function 1 interrupt interrupt-names: + minItems: 16 items: - const: serr - const: serr_cor @@ -57,20 +69,28 @@ properties: - const: pcie_evt - const: msg - const: all + - const: link_equalization_request + - const: turn_off_event + - const: pmu_poweroff + - const: d3_event_f0 + - const: d3_event_f1 + - const: cfg_pmcsr_writeclear_f0 + - const: cfg_pmcsr_writeclear_f1 interrupt-controller: true clocks: items: - description: System clock - - description: PM control clock + - description: PM control clock or clock for L1 substate handling clock-names: items: - const: aclk - - const: pm + - enum: [pm, pmu] resets: + minItems: 1 items: - description: AXI2PCIe Bridge reset - description: Data link layer/transaction layer reset @@ -81,6 +101,7 @@ properties: - description: Configuration register reset reset-names: + minItems: 1 items: - const: aresetn - const: rst_b @@ -128,7 +149,9 @@ patternProperties: const: 0x1912 device-id: - const: 0x0033 + enum: + - 0x0033 + - 0x0039 clocks: items: @@ -167,6 +190,44 @@ required: allOf: - $ref: /schemas/pci/pci-host-bridge.yaml# + - if: + properties: + compatible: + contains: + const: renesas,r9a08g045-pcie + then: + properties: + interrupts: + maxItems: 16 + interrupt-names: + maxItems: 16 + clock-names: + items: + - const: aclk + - const: pm + resets: + minItems: 7 + reset-names: + minItems: 7 + - if: + properties: + compatible: + contains: + const: renesas,r9a09g047-pcie + then: + properties: + interrupts: + minItems: 23 + interrupt-names: + minItems: 23 + clock-names: + items: + - const: aclk + - const: pmu + resets: + maxItems: 1 + reset-names: + maxItems: 1 unevaluatedProperties: false |
