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authorAlexandre Courbot <acourbot@nvidia.com>2026-08-05 14:01:45 +0900
committerDanilo Krummrich <dakr@kernel.org>2026-08-06 22:49:18 +0200
commitd1dc8faf1152e39070250df714b2d544c8ae32bb (patch)
treea20439bab33f96e3574853a9620b9950013387d3 /drivers/gpu
parent7923d0bc8ede8786f83b15bce5876cf112c347a6 (diff)
downloadlinux-d1dc8faf1152e39070250df714b2d544c8ae32bb.tar.gz
linux-d1dc8faf1152e39070250df714b2d544c8ae32bb.zip
gpu: nova-core: falcon: remove unnecessary check
The `try_with_base` call performed on `NV_PFALCON_FALCON_DMATRFBASE1` already returns `EOVERFLOW` if the address is too large for the register, making this check redundant. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Link: https://patch.msgid.link/20260805-falcon-dma-projections-v2-1-4cc9f3f13ee9@nvidia.com Signed-off-by: Danilo Krummrich <dakr@kernel.org>
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/nova-core/falcon.rs9
1 files changed, 1 insertions, 8 deletions
diff --git a/drivers/gpu/nova-core/falcon.rs b/drivers/gpu/nova-core/falcon.rs
index a91cbdd5d636..cd05985f5ee6 100644
--- a/drivers/gpu/nova-core/falcon.rs
+++ b/drivers/gpu/nova-core/falcon.rs
@@ -9,8 +9,7 @@ use kernel::{
dma::{
Coherent,
CoherentBox,
- DmaAddress,
- DmaMask, //
+ DmaAddress, //
},
io::{
poll::read_poll_timeout,
@@ -534,12 +533,6 @@ impl<'a, E: FalconEngine + 'static> Falcon<'a, E> {
return Err(EINVAL);
}
- // The DMATRFBASE/1 register pair only supports a 49-bit address.
- if dma_start > DmaMask::new::<49>().value() {
- dev_err!(self.dev, "DMA address {:#x} exceeds 49 bits\n", dma_start);
- return Err(ERANGE);
- }
-
// DMA transfers can only be done in units of 256 bytes. Compute how many such transfers we
// need to perform.
let num_transfers = load_offsets.len.div_ceil(DMA_LEN);