diff options
| author | Karol Kolacinski <karol.kolacinski@intel.com> | 2025-05-01 15:54:17 -0700 |
|---|---|---|
| committer | Tony Nguyen <anthony.l.nguyen@intel.com> | 2025-06-18 08:59:23 -0700 |
| commit | 0dffcea4121a5424d8ec4b8aef32feb9106726f1 (patch) | |
| tree | 1e84fff64ec0a21f23b7af9692486a7b4e18c2d7 /drivers | |
| parent | b3b26c983a55d8309c8acea192ab54ed5af96c78 (diff) | |
| download | linux-0dffcea4121a5424d8ec4b8aef32feb9106726f1.tar.gz linux-0dffcea4121a5424d8ec4b8aef32feb9106726f1.zip | |
ice: add TSPLL log config helper
Add a helper function to print new/current TSPLL config. This helps
avoid unnecessary casts from u8 to enums.
Reviewed-by: Michal Kubiak <michal.kubiak@intel.com>
Reviewed-by: Milena Olech <milena.olech@intel.com>
Signed-off-by: Karol Kolacinski <karol.kolacinski@intel.com>
Tested-by: Rinitha S <sx.rinitha@intel.com> (A Contingent worker at Intel)
Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/net/ethernet/intel/ice/ice_tspll.c | 54 |
1 files changed, 30 insertions, 24 deletions
diff --git a/drivers/net/ethernet/intel/ice/ice_tspll.c b/drivers/net/ethernet/intel/ice/ice_tspll.c index cf0e37296796..08af4ced50eb 100644 --- a/drivers/net/ethernet/intel/ice/ice_tspll.c +++ b/drivers/net/ethernet/intel/ice/ice_tspll.c @@ -90,6 +90,26 @@ static const char *ice_tspll_clk_src_str(enum ice_clk_src clk_src) } /** + * ice_tspll_log_cfg - Log current/new TSPLL configuration + * @hw: Pointer to the HW struct + * @enable: CGU enabled/disabled + * @clk_src: Current clock source + * @tspll_freq: Current clock frequency + * @lock: CGU lock status + * @new_cfg: true if this is a new config + */ +static void ice_tspll_log_cfg(struct ice_hw *hw, bool enable, u8 clk_src, + u8 tspll_freq, bool lock, bool new_cfg) +{ + dev_dbg(ice_hw_to_dev(hw), + "%s TSPLL configuration -- %s, src %s, freq %s, PLL %s\n", + new_cfg ? "New" : "Current", str_enabled_disabled(enable), + ice_tspll_clk_src_str((enum ice_clk_src)clk_src), + ice_tspll_clk_freq_str((enum ice_tspll_freq)tspll_freq), + lock ? "locked" : "unlocked"); +} + +/** * ice_tspll_cfg_e82x - Configure the Clock Generation Unit TSPLL * @hw: Pointer to the HW struct * @clk_freq: Clock frequency to program @@ -144,12 +164,9 @@ static int ice_tspll_cfg_e82x(struct ice_hw *hw, enum ice_tspll_freq clk_freq, if (err) return err; - /* Log the current clock configuration */ - ice_debug(hw, ICE_DBG_PTP, "Current TSPLL configuration -- %s, clk_src %s, clk_freq %s, PLL %s\n", - str_enabled_disabled(dw24.ts_pll_enable), - ice_tspll_clk_src_str(dw24.time_ref_sel), - ice_tspll_clk_freq_str(dw9.time_ref_freq_sel), - bwm_lf.plllock_true_lock_cri ? "locked" : "unlocked"); + ice_tspll_log_cfg(hw, dw24.ts_pll_enable, dw24.time_ref_sel, + dw9.time_ref_freq_sel, bwm_lf.plllock_true_lock_cri, + false); /* Disable the PLL before changing the clock source or frequency */ if (dw24.ts_pll_enable) { @@ -222,12 +239,8 @@ static int ice_tspll_cfg_e82x(struct ice_hw *hw, enum ice_tspll_freq clk_freq, return -EBUSY; } - /* Log the current clock configuration */ - ice_debug(hw, ICE_DBG_PTP, "New TSPLL configuration -- %s, clk_src %s, clk_freq %s, PLL %s\n", - str_enabled_disabled(dw24.ts_pll_enable), - ice_tspll_clk_src_str(dw24.time_ref_sel), - ice_tspll_clk_freq_str(dw9.time_ref_freq_sel), - bwm_lf.plllock_true_lock_cri ? "locked" : "unlocked"); + ice_tspll_log_cfg(hw, dw24.ts_pll_enable, clk_src, clk_freq, true, + true); return 0; } @@ -316,12 +329,9 @@ static int ice_tspll_cfg_e825c(struct ice_hw *hw, enum ice_tspll_freq clk_freq, if (err) return err; - /* Log the current clock configuration */ - ice_debug(hw, ICE_DBG_PTP, "Current TSPLL configuration -- %s, clk_src %s, clk_freq %s, PLL %s\n", - str_enabled_disabled(dw23.ts_pll_enable), - ice_tspll_clk_src_str(dw23.time_ref_sel), - ice_tspll_clk_freq_str(dw9.time_ref_freq_sel), - ro_lock.plllock_true_lock_cri ? "locked" : "unlocked"); + ice_tspll_log_cfg(hw, dw23.ts_pll_enable, dw23.time_ref_sel, + dw9.time_ref_freq_sel, + ro_lock.plllock_true_lock_cri, false); /* Disable the PLL before changing the clock source or frequency */ if (dw23.ts_pll_enable) { @@ -414,12 +424,8 @@ static int ice_tspll_cfg_e825c(struct ice_hw *hw, enum ice_tspll_freq clk_freq, return -EBUSY; } - /* Log the current clock configuration */ - ice_debug(hw, ICE_DBG_PTP, "New TSPLL configuration -- %s, clk_src %s, clk_freq %s, PLL %s\n", - str_enabled_disabled(dw23.ts_pll_enable), - ice_tspll_clk_src_str(dw23.time_ref_sel), - ice_tspll_clk_freq_str(dw9.time_ref_freq_sel), - ro_lock.plllock_true_lock_cri ? "locked" : "unlocked"); + ice_tspll_log_cfg(hw, dw23.ts_pll_enable, clk_src, clk_freq, true, + true); return 0; } |
