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| author | Arnd Bergmann <arnd@arndb.de> | 2020-05-21 12:34:22 +0200 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2020-05-21 12:34:23 +0200 |
| commit | 8c915019e3e01a2191b7787bb5929fbc84908a9b (patch) | |
| tree | 17faae12119ed2a9e55d0d506865694271392137 /include | |
| parent | 18e48cc0ba9cf24eae73858c7c44a78f9a53bef0 (diff) | |
| parent | 378788120bed12cfafc17e0348710c145f598644 (diff) | |
| download | linux-8c915019e3e01a2191b7787bb5929fbc84908a9b.tar.gz linux-8c915019e3e01a2191b7787bb5929fbc84908a9b.zip | |
Merge tag 'realtek-dt-for-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/afaerber/linux-realtek into arm/dt
Realtek Arm based SoC DT for v5.8
Add RTD1195, RTD1395 and RTD1619 SoCs as well as Xnano X5 TV box.
Clean up memory nodes and /soc ranges. Factor out r-bus and partition it
into CRT, Iso, Misc, SB2 and SCPU Wrapper blocks.
* tag 'realtek-dt-for-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/afaerber/linux-realtek: (35 commits)
dt-bindings: reset: rtd1295: Add SB2 reset
arm64: dts: realtek: rtd16xx: Add SB2 and SCPU Wrapper syscon nodes
arm64: dts: realtek: rtd139x: Add SB2 and SCPU Wrapper syscon nodes
arm64: dts: realtek: rtd129x: Add SB2 and SCPU Wrapper syscon nodes
ARM: dts: rtd1195: Add SB2 and SCPU Wrapper syscon nodes
arm64: dts: realtek: rtd16xx: Add CRT syscon node
ARM: dts: rtd1195: Add UART resets
ARM: dts: rtd1195: Add reset nodes
dt-bindings: reset: Add Realtek RTD1195
ARM: dts: rtd1195: Add CRT syscon node
arm64: dts: realtek: rtd16xx: Introduce iso and misc syscon
arm64: dts: realtek: rtd139x: Introduce CRT, iso and misc syscon
arm64: dts: realtek: rtd129x: Introduce CRT, iso and misc syscon
ARM: dts: rtd1195: Introduce iso and misc syscon
arm64: dts: realtek: rtd1295: Add Xnano X5
dt-bindings: arm: realtek: Add Xnano X5
dt-bindings: vendor-prefixes: Add Xnano
arm64: dts: realtek: rtd16xx: Add memory reservations
arm64: dts: realtek: rtd16xx: Carve out boot ROM from memory
arm64: dts: realtek: Add RTD1619 SoC and Realtek Mjolnir EVB
...
Link: https://lore.kernel.org/r/20200510232158.18477-2-afaerber@suse.de
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'include')
| -rw-r--r-- | include/dt-bindings/reset/realtek,rtd1195.h | 74 | ||||
| -rw-r--r-- | include/dt-bindings/reset/realtek,rtd1295.h | 3 |
2 files changed, 77 insertions, 0 deletions
diff --git a/include/dt-bindings/reset/realtek,rtd1195.h b/include/dt-bindings/reset/realtek,rtd1195.h new file mode 100644 index 000000000000..27902abf935b --- /dev/null +++ b/include/dt-bindings/reset/realtek,rtd1195.h @@ -0,0 +1,74 @@ +/* SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) */ +/* + * Realtek RTD1195 reset controllers + * + * Copyright (c) 2017 Andreas Färber + */ +#ifndef DT_BINDINGS_RESET_RTD1195_H +#define DT_BINDINGS_RESET_RTD1195_H + +/* soft reset 1 */ +#define RTD1195_RSTN_MISC 0 +#define RTD1195_RSTN_RNG 1 +#define RTD1195_RSTN_USB3_POW 2 +#define RTD1195_RSTN_GSPI 3 +#define RTD1195_RSTN_USB3_P0_MDIO 4 +#define RTD1195_RSTN_VE_H265 5 +#define RTD1195_RSTN_USB 6 +#define RTD1195_RSTN_USB_PHY0 8 +#define RTD1195_RSTN_USB_PHY1 9 +#define RTD1195_RSTN_HDMIRX 11 +#define RTD1195_RSTN_HDMI 12 +#define RTD1195_RSTN_ETN 14 +#define RTD1195_RSTN_AIO 15 +#define RTD1195_RSTN_GPU 16 +#define RTD1195_RSTN_VE_H264 17 +#define RTD1195_RSTN_VE_JPEG 18 +#define RTD1195_RSTN_TVE 19 +#define RTD1195_RSTN_VO 20 +#define RTD1195_RSTN_LVDS 21 +#define RTD1195_RSTN_SE 22 +#define RTD1195_RSTN_DCU 23 +#define RTD1195_RSTN_DC_PHY 24 +#define RTD1195_RSTN_CP 25 +#define RTD1195_RSTN_MD 26 +#define RTD1195_RSTN_TP 27 +#define RTD1195_RSTN_AE 28 +#define RTD1195_RSTN_NF 29 +#define RTD1195_RSTN_MIPI 30 + +/* soft reset 2 */ +#define RTD1195_RSTN_ACPU 0 +#define RTD1195_RSTN_VCPU 1 +#define RTD1195_RSTN_PCR 9 +#define RTD1195_RSTN_CR 10 +#define RTD1195_RSTN_EMMC 11 +#define RTD1195_RSTN_SDIO 12 +#define RTD1195_RSTN_I2C_5 18 +#define RTD1195_RSTN_RTC 20 +#define RTD1195_RSTN_I2C_4 23 +#define RTD1195_RSTN_I2C_3 24 +#define RTD1195_RSTN_I2C_2 25 +#define RTD1195_RSTN_I2C_1 26 +#define RTD1195_RSTN_UR1 28 + +/* soft reset 3 */ +#define RTD1195_RSTN_SB2 0 + +/* iso soft reset */ +#define RTD1195_ISO_RSTN_VFD 0 +#define RTD1195_ISO_RSTN_IR 1 +#define RTD1195_ISO_RSTN_CEC0 2 +#define RTD1195_ISO_RSTN_CEC1 3 +#define RTD1195_ISO_RSTN_DP 4 +#define RTD1195_ISO_RSTN_CBUSTX 5 +#define RTD1195_ISO_RSTN_CBUSRX 6 +#define RTD1195_ISO_RSTN_EFUSE 7 +#define RTD1195_ISO_RSTN_UR0 8 +#define RTD1195_ISO_RSTN_GMAC 9 +#define RTD1195_ISO_RSTN_GPHY 10 +#define RTD1195_ISO_RSTN_I2C_0 11 +#define RTD1195_ISO_RSTN_I2C_6 12 +#define RTD1195_ISO_RSTN_CBUS 13 + +#endif diff --git a/include/dt-bindings/reset/realtek,rtd1295.h b/include/dt-bindings/reset/realtek,rtd1295.h index 2c0cb6afe816..dd89e4c80264 100644 --- a/include/dt-bindings/reset/realtek,rtd1295.h +++ b/include/dt-bindings/reset/realtek,rtd1295.h @@ -75,6 +75,9 @@ #define RTD1295_RSTN_CBUS_TX 30 #define RTD1295_RSTN_SDS_PHY 31 +/* soft reset 3 */ +#define RTD1295_RSTN_SB2 0 + /* soft reset 4 */ #define RTD1295_RSTN_DCPHY_CRT 0 #define RTD1295_RSTN_DCPHY_ALERT_RX 1 |
