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authorBjorn Andersson <andersson@kernel.org>2026-07-11 12:57:01 -0500
committerBjorn Andersson <andersson@kernel.org>2026-07-11 12:57:01 -0500
commitb14992f79680967eac6d6295309e51353c587277 (patch)
tree28cf207658de89daba70198097381b848d87b031 /include
parentecb42d97c8e143e8d9482e8d7019d06019cd961b (diff)
parentdd7ddd057fcd9301ff0c9908e8a856f5ca112f29 (diff)
downloadlinux-b14992f79680967eac6d6295309e51353c587277.tar.gz
linux-b14992f79680967eac6d6295309e51353c587277.zip
Merge branch '20260707-b4-ipq9650_refgen_clocks-v1-1-e070624d03d2@oss.qualcomm.com' into clk-for-7.3
Merge the IPQ9650 refgen clock ids through a topic branch, in case they need to be referenced from DeviceTree branches as well before next release.
Diffstat (limited to 'include')
-rw-r--r--include/dt-bindings/clock/qcom,ipq9650-gcc.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/include/dt-bindings/clock/qcom,ipq9650-gcc.h b/include/dt-bindings/clock/qcom,ipq9650-gcc.h
index afd17c00d96e..2d43ca36c09c 100644
--- a/include/dt-bindings/clock/qcom,ipq9650-gcc.h
+++ b/include/dt-bindings/clock/qcom,ipq9650-gcc.h
@@ -169,4 +169,9 @@
#define GPLL2 160
#define GPLL2_OUT_MAIN 161
#define GPLL4 162
+#define GCC_REFGEN_CORE_CLK_SRC 163
+#define GCC_REFGEN_PCIE_CORE_CLK 164
+#define GCC_REFGEN_PCIE_HCLK 165
+#define GCC_REFGEN_CMN_UPHY_HCLK 166
+#define GCC_REFGEN_CMN_UPHY_CORE_CLK 167
#endif