Merge remote-tracking branch 'asoc/for-7.3' into asoc-next

15 files changed, 842 insertions, 121 deletions

diff --git a/include/dt-bindings/sound/qcom,q6dsp-lpass-ports.h b/include/dt-bindings/sound/qcom,q6dsp-lpass-ports.h
index 45850f2d4342..ca84952c3884 100644
--- a/include/dt-bindings/sound/qcom,q6dsp-lpass-ports.h
+++ b/include/dt-bindings/sound/qcom,q6dsp-lpass-ports.h
@@ -152,6 +152,10 @@
 #define LPI_MI2S_TX_4		146
 #define SENARY_MI2S_RX		147
 #define SENARY_MI2S_TX		148
+#define LPI_MI2S_RX_5		149
+#define LPI_MI2S_TX_5		150
+#define LPI_MI2S_RX_6		151
+#define LPI_MI2S_TX_6		152
 
 #define LPASS_CLK_ID_PRI_MI2S_IBIT	1
 #define LPASS_CLK_ID_PRI_MI2S_EBIT	2
@@ -236,8 +240,7 @@
 #define LPASS_HW_AVTIMER_VOTE		101
 #define LPASS_HW_MACRO_VOTE		102
 #define LPASS_HW_DCODEC_VOTE		103
-
-#define Q6AFE_MAX_CLK_ID			104
+#define LPASS_HW_LPR_VOTE		104
 
 #define LPASS_CLK_ATTRIBUTE_INVALID		0x0
 #define LPASS_CLK_ATTRIBUTE_COUPLE_NO		0x1
diff --git a/include/linux/platform_data/omap-twl4030.h b/include/linux/platform_data/omap-twl4030.h
deleted file mode 100644
index 7fcb55fe21c9..000000000000
--- a/include/linux/platform_data/omap-twl4030.h
+++ /dev/null
@@ -1,42 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/**
- * omap-twl4030.h - ASoC machine driver for TI SoC based boards with twl4030
- *		    codec, header.
- *
- * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com
- * All rights reserved.
- *
- * Author: Peter Ujfalusi <peter.ujfalusi@ti.com>
- */
-
-#ifndef _OMAP_TWL4030_H_
-#define _OMAP_TWL4030_H_
-
-/* To select if only one channel is connected in a stereo port */
-#define OMAP_TWL4030_LEFT	(1 << 0)
-#define OMAP_TWL4030_RIGHT	(1 << 1)
-
-struct omap_tw4030_pdata {
-	const char *card_name;
-	/* Voice port is connected to McBSP3 */
-	bool voice_connected;
-
-	/* The driver will parse the connection flags if this flag is set */
-	bool	custom_routing;
-	/* Flags to indicate connected audio ports. */
-	u8	has_hs;
-	u8	has_hf;
-	u8	has_predriv;
-	u8	has_carkit;
-	bool	has_ear;
-
-	bool	has_mainmic;
-	bool	has_submic;
-	bool	has_hsmic;
-	bool	has_carkitmic;
-	bool	has_digimic0;
-	bool	has_digimic1;
-	u8	has_linein;
-};
-
-#endif /* _OMAP_TWL4030_H_ */
diff --git a/include/sound/aw88399.h b/include/sound/aw88399.h
new file mode 100644
index 000000000000..a1e0de6be8ea
--- /dev/null
+++ b/include/sound/aw88399.h
@@ -0,0 +1,621 @@
+/* SPDX-License-Identifier: GPL-2.0-only
+ *
+ * linux/sound/aw88399.h --  Platform data for AW88399
+ *
+ * Copyright (c) 2023 AWINIC Technology CO., LTD
+ *
+ * Author: Weidong Wang <wangweidong.a@awinic.com>
+ */
+
+#ifndef __SOUND_AW88399_H
+#define __SOUND_AW88399_H
+
+#include <linux/mutex.h>
+#include <linux/workqueue.h>
+
+/* registers list */
+#define AW88399_ID_REG			(0x00)
+#define AW88399_SYSST_REG		(0x01)
+#define AW88399_SYSINT_REG		(0x02)
+#define AW88399_SYSINTM_REG		(0x03)
+#define AW88399_SYSCTRL_REG		(0x04)
+#define AW88399_SYSCTRL2_REG		(0x05)
+#define AW88399_I2SCTRL1_REG		(0x06)
+#define AW88399_I2SCTRL2_REG		(0x07)
+#define AW88399_I2SCTRL3_REG		(0x08)
+#define AW88399_DACCFG1_REG		(0x09)
+#define AW88399_DACCFG2_REG		(0x0A)
+#define AW88399_DACCFG3_REG		(0x0B)
+#define AW88399_DACCFG4_REG		(0x0C)
+#define AW88399_DACCFG5_REG		(0x0D)
+#define AW88399_DACCFG6_REG		(0x0E)
+#define AW88399_DACCFG7_REG		(0x0F)
+#define AW88399_MPDCFG1_REG		(0x10)
+#define AW88399_MPDCFG2_REG		(0x11)
+#define AW88399_MPDCFG3_REG		(0x12)
+#define AW88399_MPDCFG4_REG		(0x13)
+#define AW88399_PWMCTRL1_REG		(0x14)
+#define AW88399_PWMCTRL2_REG		(0x15)
+#define AW88399_PWMCTRL3_REG		(0x16)
+#define AW88399_I2SCFG1_REG		(0x17)
+#define AW88399_DBGCTRL_REG		(0x18)
+#define AW88399_HAGCST_REG		(0x20)
+#define AW88399_VBAT_REG		(0x21)
+#define AW88399_TEMP_REG		(0x22)
+#define AW88399_PVDD_REG		(0x23)
+#define AW88399_ISNDAT_REG		(0x24)
+#define AW88399_VSNDAT_REG		(0x25)
+#define AW88399_I2SINT_REG		(0x26)
+#define AW88399_I2SCAPCNT_REG		(0x27)
+#define AW88399_ANASTA1_REG		(0x28)
+#define AW88399_ANASTA2_REG		(0x29)
+#define AW88399_ANASTA3_REG		(0x2A)
+#define AW88399_TESTDET_REG		(0x2B)
+#define AW88399_DSMCFG1_REG		(0x30)
+#define AW88399_DSMCFG2_REG		(0x31)
+#define AW88399_DSMCFG3_REG		(0x32)
+#define AW88399_DSMCFG4_REG		(0x33)
+#define AW88399_DSMCFG5_REG		(0x34)
+#define AW88399_DSMCFG6_REG		(0x35)
+#define AW88399_DSMCFG7_REG		(0x36)
+#define AW88399_DSMCFG8_REG		(0x37)
+#define AW88399_TESTIN_REG		(0x38)
+#define AW88399_TESTOUT_REG		(0x39)
+#define AW88399_MEMTEST_REG		(0x3A)
+#define AW88399_VSNCTRL1_REG		(0x3B)
+#define AW88399_ISNCTRL1_REG		(0x3C)
+#define AW88399_ISNCTRL2_REG		(0x3D)
+#define AW88399_DSPMADD_REG		(0x40)
+#define AW88399_DSPMDAT_REG		(0x41)
+#define AW88399_WDT_REG		(0x42)
+#define AW88399_ACR1_REG		(0x43)
+#define AW88399_ACR2_REG		(0x44)
+#define AW88399_ASR1_REG		(0x45)
+#define AW88399_ASR2_REG		(0x46)
+#define AW88399_DSPCFG_REG		(0x47)
+#define AW88399_ASR3_REG		(0x48)
+#define AW88399_ASR4_REG		(0x49)
+#define AW88399_DSPVCALB_REG		(0x4A)
+#define AW88399_CRCCTRL_REG		(0x4B)
+#define AW88399_DSPDBG1_REG		(0x4C)
+#define AW88399_DSPDBG2_REG		(0x4D)
+#define AW88399_DSPDBG3_REG		(0x4E)
+#define AW88399_PLLCTRL1_REG		(0x50)
+#define AW88399_PLLCTRL2_REG		(0x51)
+#define AW88399_PLLCTRL3_REG		(0x52)
+#define AW88399_CDACTRL1_REG		(0x53)
+#define AW88399_CDACTRL2_REG		(0x54)
+#define AW88399_CDACTRL3_REG		(0x55)
+#define AW88399_SADCCTRL1_REG		(0x56)
+#define AW88399_SADCCTRL2_REG		(0x57)
+#define AW88399_BOPCTRL1_REG		(0x58)
+#define AW88399_BOPCTRL2_REG		(0x5A)
+#define AW88399_BOPCTRL3_REG		(0x5B)
+#define AW88399_BOPCTRL4_REG		(0x5C)
+#define AW88399_BOPCTRL5_REG		(0x5D)
+#define AW88399_BOPCTRL6_REG		(0x5E)
+#define AW88399_BOPCTRL7_REG		(0x5F)
+#define AW88399_BSTCTRL1_REG		(0x60)
+#define AW88399_BSTCTRL2_REG		(0x61)
+#define AW88399_BSTCTRL3_REG		(0x62)
+#define AW88399_BSTCTRL4_REG		(0x63)
+#define AW88399_BSTCTRL5_REG		(0x64)
+#define AW88399_BSTCTRL6_REG		(0x65)
+#define AW88399_BSTCTRL7_REG		(0x66)
+#define AW88399_BSTCTRL8_REG		(0x67)
+#define AW88399_BSTCTRL9_REG		(0x68)
+#define AW88399_BSTCTRL10_REG		(0x69)
+#define AW88399_CPCTRL_REG		(0x6A)
+#define AW88399_EFWH_REG		(0x6C)
+#define AW88399_EFWM2_REG		(0x6D)
+#define AW88399_EFWM1_REG		(0x6E)
+#define AW88399_EFWL_REG		(0x6F)
+#define AW88399_TESTCTRL1_REG		(0x70)
+#define AW88399_TESTCTRL2_REG		(0x71)
+#define AW88399_EFCTRL1_REG		(0x72)
+#define AW88399_EFCTRL2_REG		(0x73)
+#define AW88399_EFRH4_REG		(0x74)
+#define AW88399_EFRH3_REG		(0x75)
+#define AW88399_EFRH2_REG		(0x76)
+#define AW88399_EFRH1_REG		(0x77)
+#define AW88399_EFRL4_REG		(0x78)
+#define AW88399_EFRL3_REG		(0x79)
+#define AW88399_EFRL2_REG		(0x7A)
+#define AW88399_EFRL1_REG		(0x7B)
+#define AW88399_TM_REG			(0x7C)
+#define AW88399_TM2_REG		(0x7D)
+
+#define AW88399_REG_MAX		(0x7E)
+#define AW88399_MUTE_VOL		(1023)
+
+#define AW88399_DSP_CFG_ADDR		(0x9B00)
+#define AW88399_DSP_REG_CFG_ADPZ_RA	(0x9B68)
+#define AW88399_DSP_FW_ADDR		(0x8980)
+#define AW88399_DSP_ROM_CHECK_ADDR	(0x1F40)
+#define AW88399_DSP_ROM_CHECK_DATA	(0x4638)
+
+#define AW88399_CALI_RE_HBITS_MASK	(~(0xFFFF0000))
+#define AW88399_CALI_RE_HBITS_SHIFT	(16)
+
+#define AW88399_CALI_RE_LBITS_MASK	(~(0xFFFF))
+#define AW88399_CALI_RE_LBITS_SHIFT	(0)
+
+#define AW88399_I2STXEN_START_BIT	(9)
+#define AW88399_I2STXEN_BITS_LEN	(1)
+#define AW88399_I2STXEN_MASK		\
+	(~(((1<<AW88399_I2STXEN_BITS_LEN)-1) << AW88399_I2STXEN_START_BIT))
+
+#define AW88399_I2STXEN_DISABLE	(0)
+#define AW88399_I2STXEN_DISABLE_VALUE	\
+	(AW88399_I2STXEN_DISABLE << AW88399_I2STXEN_START_BIT)
+
+#define AW88399_I2STXEN_ENABLE		(1)
+#define AW88399_I2STXEN_ENABLE_VALUE	\
+	(AW88399_I2STXEN_ENABLE << AW88399_I2STXEN_START_BIT)
+
+#define AW88399_VOL_START_BIT		(0)
+#define AW88399_VOL_BITS_LEN		(10)
+#define AW88399_VOL_MASK		\
+	(~(((1<<AW88399_VOL_BITS_LEN)-1) << AW88399_VOL_START_BIT))
+
+#define AW88399_PWDN_START_BIT		(0)
+#define AW88399_PWDN_BITS_LEN		(1)
+#define AW88399_PWDN_MASK		\
+	(~(((1<<AW88399_PWDN_BITS_LEN)-1) << AW88399_PWDN_START_BIT))
+
+#define AW88399_PWDN_POWER_DOWN	(1)
+#define AW88399_PWDN_POWER_DOWN_VALUE	\
+	(AW88399_PWDN_POWER_DOWN << AW88399_PWDN_START_BIT)
+
+#define AW88399_PWDN_WORKING		(0)
+#define AW88399_PWDN_WORKING_VALUE	\
+	(AW88399_PWDN_WORKING << AW88399_PWDN_START_BIT)
+
+#define AW88399_DSPBY_START_BIT	(2)
+#define AW88399_DSPBY_BITS_LEN		(1)
+#define AW88399_DSPBY_MASK		\
+	(~(((1<<AW88399_DSPBY_BITS_LEN)-1) << AW88399_DSPBY_START_BIT))
+
+#define AW88399_DSPBY_WORKING		(0)
+#define AW88399_DSPBY_WORKING_VALUE	\
+	(AW88399_DSPBY_WORKING << AW88399_DSPBY_START_BIT)
+
+#define AW88399_DSPBY_BYPASS		(1)
+#define AW88399_DSPBY_BYPASS_VALUE	\
+	(AW88399_DSPBY_BYPASS << AW88399_DSPBY_START_BIT)
+
+#define AW88399_MEM_CLKSEL_START_BIT	(3)
+#define AW88399_MEM_CLKSEL_BITS_LEN	(1)
+#define AW88399_MEM_CLKSEL_MASK		\
+	(~(((1<<AW88399_MEM_CLKSEL_BITS_LEN)-1) << AW88399_MEM_CLKSEL_START_BIT))
+
+#define AW88399_MEM_CLKSEL_OSCCLK	(0)
+#define AW88399_MEM_CLKSEL_OSCCLK_VALUE	\
+	(AW88399_MEM_CLKSEL_OSCCLK << AW88399_MEM_CLKSEL_START_BIT)
+
+#define AW88399_MEM_CLKSEL_DAPHCLK	(1)
+#define AW88399_MEM_CLKSEL_DAPHCLK_VALUE	\
+	(AW88399_MEM_CLKSEL_DAPHCLK << AW88399_MEM_CLKSEL_START_BIT)
+
+#define AW88399_DITHER_EN_START_BIT	(15)
+#define AW88399_DITHER_EN_BITS_LEN	(1)
+#define AW88399_DITHER_EN_MASK		 \
+	(~(((1<<AW88399_DITHER_EN_BITS_LEN)-1) << AW88399_DITHER_EN_START_BIT))
+
+#define AW88399_DITHER_EN_DISABLE	(0)
+#define AW88399_DITHER_EN_DISABLE_VALUE	\
+	(AW88399_DITHER_EN_DISABLE << AW88399_DITHER_EN_START_BIT)
+
+#define AW88399_DITHER_EN_ENABLE	(1)
+#define AW88399_DITHER_EN_ENABLE_VALUE	\
+	(AW88399_DITHER_EN_ENABLE << AW88399_DITHER_EN_START_BIT)
+
+#define AW88399_HMUTE_START_BIT	(8)
+#define AW88399_HMUTE_BITS_LEN		(1)
+#define AW88399_HMUTE_MASK		\
+	(~(((1<<AW88399_HMUTE_BITS_LEN)-1) << AW88399_HMUTE_START_BIT))
+
+#define AW88399_HMUTE_DISABLE		(0)
+#define AW88399_HMUTE_DISABLE_VALUE	\
+	(AW88399_HMUTE_DISABLE << AW88399_HMUTE_START_BIT)
+
+#define AW88399_HMUTE_ENABLE		(1)
+#define AW88399_HMUTE_ENABLE_VALUE	\
+	(AW88399_HMUTE_ENABLE << AW88399_HMUTE_START_BIT)
+
+#define AW88399_EF_DBMD_START_BIT	(2)
+#define AW88399_EF_DBMD_BITS_LEN	(1)
+#define AW88399_EF_DBMD_MASK		\
+	(~(((1<<AW88399_EF_DBMD_BITS_LEN)-1) << AW88399_EF_DBMD_START_BIT))
+
+#define AW88399_EF_DBMD_OR		(1)
+#define AW88399_EF_DBMD_OR_VALUE	\
+	(AW88399_EF_DBMD_OR << AW88399_EF_DBMD_START_BIT)
+
+#define AW88399_VDSEL_START_BIT	(5)
+#define AW88399_VDSEL_BITS_LEN		(1)
+#define AW88399_VDSEL_MASK		\
+	(~(((1<<AW88399_VDSEL_BITS_LEN)-1) << AW88399_VDSEL_START_BIT))
+
+#define AW88399_EF_ISN_GESLP_H_START_BIT	(0)
+#define AW88399_EF_ISN_GESLP_H_BITS_LEN	(10)
+#define AW88399_EF_ISN_GESLP_H_MASK		\
+	(~(((1<<AW88399_EF_ISN_GESLP_H_BITS_LEN)-1) << AW88399_EF_ISN_GESLP_H_START_BIT))
+
+/* EF_VSN_GESLP_H bit 9:0 (EFRH3 0x75) */
+#define AW88399_EF_VSN_GESLP_H_START_BIT	(0)
+#define AW88399_EF_VSN_GESLP_H_BITS_LEN	(10)
+#define AW88399_EF_VSN_GESLP_H_MASK		\
+	(~(((1<<AW88399_EF_VSN_GESLP_H_BITS_LEN)-1) << AW88399_EF_VSN_GESLP_H_START_BIT))
+
+#define AW88399_EF_ISN_GESLP_L_START_BIT	(0)
+#define AW88399_EF_ISN_GESLP_L_BITS_LEN	(10)
+#define AW88399_EF_ISN_GESLP_L_MASK		\
+	(~(((1<<AW88399_EF_ISN_GESLP_L_BITS_LEN)-1) << AW88399_EF_ISN_GESLP_L_START_BIT))
+
+/* EF_VSN_GESLP_L bit 9:0 (EFRL3 0x79) */
+#define AW88399_EF_VSN_GESLP_L_START_BIT	(0)
+#define AW88399_EF_VSN_GESLP_L_BITS_LEN	(10)
+#define AW88399_EF_VSN_GESLP_L_MASK		\
+	(~(((1<<AW88399_EF_VSN_GESLP_L_BITS_LEN)-1) << AW88399_EF_VSN_GESLP_L_START_BIT))
+
+#define AW88399_INTERNAL_VSN_TRIM_H_START_BIT	(9)
+#define AW88399_INTERNAL_VSN_TRIM_H_BITS_LEN	(6)
+#define AW88399_INTERNAL_VSN_TRIM_H_MASK	\
+	(~(((1<<AW88399_INTERNAL_VSN_TRIM_H_BITS_LEN)-1) << AW88399_INTERNAL_VSN_TRIM_H_START_BIT))
+
+#define AW88399_INTERNAL_VSN_TRIM_L_START_BIT	(9)
+#define AW88399_INTERNAL_VSN_TRIM_L_BITS_LEN	(6)
+#define AW88399_INTERNAL_VSN_TRIM_L_MASK	\
+	(~(((1<<AW88399_INTERNAL_VSN_TRIM_L_BITS_LEN)-1) << AW88399_INTERNAL_VSN_TRIM_L_START_BIT))
+
+#define AW88399_RCV_MODE_START_BIT	(7)
+#define AW88399_RCV_MODE_BITS_LEN	(1)
+#define AW88399_RCV_MODE_MASK		\
+	(~(((1<<AW88399_RCV_MODE_BITS_LEN)-1) << AW88399_RCV_MODE_START_BIT))
+
+#define AW88399_CLKI_START_BIT		(4)
+#define AW88399_NOCLKI_START_BIT	(5)
+#define AW88399_PLLI_START_BIT		(0)
+#define AW88399_PLLI_INT_VALUE		(1)
+#define AW88399_PLLI_INT_INTERRUPT \
+	(AW88399_PLLI_INT_VALUE << AW88399_PLLI_START_BIT)
+
+#define AW88399_CLKI_INT_VALUE		(1)
+#define AW88399_CLKI_INT_INTERRUPT \
+	(AW88399_CLKI_INT_VALUE << AW88399_CLKI_START_BIT)
+
+#define AW88399_NOCLKI_INT_VALUE	(1)
+#define AW88399_NOCLKI_INT_INTERRUPT \
+	(AW88399_NOCLKI_INT_VALUE << AW88399_NOCLKI_START_BIT)
+
+#define AW88399_BIT_SYSINT_CHECK \
+		(AW88399_PLLI_INT_INTERRUPT | \
+		AW88399_CLKI_INT_INTERRUPT | \
+		AW88399_NOCLKI_INT_INTERRUPT)
+
+#define AW88399_CRC_CHECK_START_BIT	(12)
+#define AW88399_CRC_CHECK_BITS_LEN	(3)
+#define AW88399_CRC_CHECK_BITS_MASK	\
+	(~(((1<<AW88399_CRC_CHECK_BITS_LEN)-1) << AW88399_CRC_CHECK_START_BIT))
+
+#define AW88399_RCV_MODE_RECEIVER	(1)
+#define AW88399_RCV_MODE_RECEIVER_VALUE	\
+	(AW88399_RCV_MODE_RECEIVER << AW88399_RCV_MODE_START_BIT)
+
+#define AW88399_AMPPD_START_BIT	(1)
+#define AW88399_AMPPD_BITS_LEN		(1)
+#define AW88399_AMPPD_MASK		\
+	(~(((1<<AW88399_AMPPD_BITS_LEN)-1) << AW88399_AMPPD_START_BIT))
+
+#define AW88399_AMPPD_WORKING		(0)
+#define AW88399_AMPPD_WORKING_VALUE	\
+	(AW88399_AMPPD_WORKING << AW88399_AMPPD_START_BIT)
+
+#define AW88399_AMPPD_POWER_DOWN	(1)
+#define AW88399_AMPPD_POWER_DOWN_VALUE	\
+	(AW88399_AMPPD_POWER_DOWN << AW88399_AMPPD_START_BIT)
+
+#define AW88399_RAM_CG_BYP_START_BIT	(0)
+#define AW88399_RAM_CG_BYP_BITS_LEN	(1)
+#define AW88399_RAM_CG_BYP_MASK		\
+	(~(((1<<AW88399_RAM_CG_BYP_BITS_LEN)-1) << AW88399_RAM_CG_BYP_START_BIT))
+
+#define AW88399_RAM_CG_BYP_WORK	(0)
+#define AW88399_RAM_CG_BYP_WORK_VALUE	\
+	(AW88399_RAM_CG_BYP_WORK << AW88399_RAM_CG_BYP_START_BIT)
+
+#define AW88399_RAM_CG_BYP_BYPASS	(1)
+#define AW88399_RAM_CG_BYP_BYPASS_VALUE	\
+	(AW88399_RAM_CG_BYP_BYPASS << AW88399_RAM_CG_BYP_START_BIT)
+
+#define AW88399_CRC_END_ADDR_START_BIT	(0)
+#define AW88399_CRC_END_ADDR_BITS_LEN	(12)
+#define AW88399_CRC_END_ADDR_MASK	\
+	(~(((1<<AW88399_CRC_END_ADDR_BITS_LEN)-1) << AW88399_CRC_END_ADDR_START_BIT))
+
+#define AW88399_CRC_CODE_EN_START_BIT	(13)
+#define AW88399_CRC_CODE_EN_BITS_LEN	(1)
+#define AW88399_CRC_CODE_EN_MASK	\
+	(~(((1<<AW88399_CRC_CODE_EN_BITS_LEN)-1) << AW88399_CRC_CODE_EN_START_BIT))
+
+#define AW88399_CRC_CODE_EN_DISABLE	(0)
+#define AW88399_CRC_CODE_EN_DISABLE_VALUE	\
+	(AW88399_CRC_CODE_EN_DISABLE << AW88399_CRC_CODE_EN_START_BIT)
+
+#define AW88399_CRC_CODE_EN_ENABLE	(1)
+#define AW88399_CRC_CODE_EN_ENABLE_VALUE	\
+	(AW88399_CRC_CODE_EN_ENABLE << AW88399_CRC_CODE_EN_START_BIT)
+
+#define AW88399_CRC_CFG_EN_START_BIT	(12)
+#define AW88399_CRC_CFG_EN_BITS_LEN	(1)
+#define AW88399_CRC_CFG_EN_MASK		\
+	(~(((1<<AW88399_CRC_CFG_EN_BITS_LEN)-1) << AW88399_CRC_CFG_EN_START_BIT))
+
+#define AW88399_CRC_CFG_EN_DISABLE	(0)
+#define AW88399_CRC_CFG_EN_DISABLE_VALUE	\
+	(AW88399_CRC_CFG_EN_DISABLE << AW88399_CRC_CFG_EN_START_BIT)
+
+#define AW88399_CRC_CFG_EN_ENABLE	(1)
+#define AW88399_CRC_CFG_EN_ENABLE_VALUE	\
+	(AW88399_CRC_CFG_EN_ENABLE << AW88399_CRC_CFG_EN_START_BIT)
+
+#define AW88399_OCDS_START_BIT		(3)
+#define AW88399_OCDS_OC		(1)
+#define AW88399_OCDS_OC_VALUE		\
+	(AW88399_OCDS_OC << AW88399_OCDS_START_BIT)
+
+#define AW88399_NOCLKS_START_BIT	(5)
+#define AW88399_NOCLKS_NO_CLOCK	(1)
+#define AW88399_NOCLKS_NO_CLOCK_VALUE	\
+	(AW88399_NOCLKS_NO_CLOCK << AW88399_NOCLKS_START_BIT)
+
+#define AW88399_SWS_START_BIT		(8)
+#define AW88399_SWS_SWITCHING		(1)
+#define AW88399_SWS_SWITCHING_VALUE	\
+	(AW88399_SWS_SWITCHING << AW88399_SWS_START_BIT)
+
+#define AW88399_BSTS_START_BIT		(9)
+#define AW88399_BSTS_FINISHED		(1)
+#define AW88399_BSTS_FINISHED_VALUE	\
+	(AW88399_BSTS_FINISHED << AW88399_BSTS_START_BIT)
+
+#define AW88399_UVLS_START_BIT		(14)
+#define AW88399_UVLS_NORMAL		(0)
+#define AW88399_UVLS_NORMAL_VALUE	\
+	(AW88399_UVLS_NORMAL << AW88399_UVLS_START_BIT)
+
+#define AW88399_BSTOCS_START_BIT	(11)
+#define AW88399_BSTOCS_OVER_CURRENT	(1)
+#define AW88399_BSTOCS_OVER_CURRENT_VALUE	\
+	(AW88399_BSTOCS_OVER_CURRENT << AW88399_BSTOCS_START_BIT)
+
+#define AW88399_OTHS_START_BIT		(1)
+#define AW88399_OTHS_OT		(1)
+#define AW88399_OTHS_OT_VALUE		\
+	(AW88399_OTHS_OT << AW88399_OTHS_START_BIT)
+
+#define AW88399_PLLS_START_BIT		(0)
+#define AW88399_PLLS_LOCKED		(1)
+#define AW88399_PLLS_LOCKED_VALUE	\
+	(AW88399_PLLS_LOCKED << AW88399_PLLS_START_BIT)
+
+#define AW88399_CLKS_START_BIT		(4)
+#define AW88399_CLKS_STABLE		(1)
+#define AW88399_CLKS_STABLE_VALUE	\
+	(AW88399_CLKS_STABLE << AW88399_CLKS_START_BIT)
+
+#define AW88399_BIT_PLL_CHECK \
+		(AW88399_CLKS_STABLE_VALUE | \
+		AW88399_PLLS_LOCKED_VALUE)
+
+#define AW88399_BIT_SYSST_CHECK_MASK \
+		(~(AW88399_UVLS_NORMAL_VALUE | \
+		AW88399_BSTOCS_OVER_CURRENT_VALUE | \
+		AW88399_BSTS_FINISHED_VALUE | \
+		AW88399_SWS_SWITCHING_VALUE | \
+		AW88399_NOCLKS_NO_CLOCK_VALUE | \
+		AW88399_CLKS_STABLE_VALUE | \
+		AW88399_OCDS_OC_VALUE | \
+		AW88399_OTHS_OT_VALUE | \
+		AW88399_PLLS_LOCKED_VALUE))
+
+#define AW88399_BIT_SYSST_NOSWS_CHECK \
+		(AW88399_BSTS_FINISHED_VALUE | \
+		AW88399_CLKS_STABLE_VALUE | \
+		AW88399_PLLS_LOCKED_VALUE)
+
+#define AW88399_BIT_SYSST_SWS_CHECK \
+		(AW88399_BSTS_FINISHED_VALUE | \
+		AW88399_CLKS_STABLE_VALUE | \
+		AW88399_PLLS_LOCKED_VALUE | \
+		AW88399_SWS_SWITCHING_VALUE)
+
+#define AW88399_CCO_MUX_START_BIT	(14)
+#define AW88399_CCO_MUX_BITS_LEN	(1)
+#define AW88399_CCO_MUX_MASK		\
+	(~(((1<<AW88399_CCO_MUX_BITS_LEN)-1) << AW88399_CCO_MUX_START_BIT))
+
+#define AW88399_CCO_MUX_DIVIDED	(0)
+#define AW88399_CCO_MUX_DIVIDED_VALUE	\
+	(AW88399_CCO_MUX_DIVIDED << AW88399_CCO_MUX_START_BIT)
+
+#define AW88399_CCO_MUX_BYPASS		(1)
+#define AW88399_CCO_MUX_BYPASS_VALUE	\
+	(AW88399_CCO_MUX_BYPASS << AW88399_CCO_MUX_START_BIT)
+
+#define AW88399_NOISE_GATE_EN_START_BIT	(13)
+#define AW88399_NOISE_GATE_EN_BITS_LEN		(1)
+#define AW88399_NOISE_GATE_EN_MASK	\
+	(~(((1<<AW88399_NOISE_GATE_EN_BITS_LEN)-1) << AW88399_NOISE_GATE_EN_START_BIT))
+
+#define AW88399_WDT_CNT_START_BIT	(0)
+#define AW88399_WDT_CNT_BITS_LEN	(8)
+#define AW88399_WDT_CNT_MASK		\
+	(~(((1<<AW88399_WDT_CNT_BITS_LEN)-1) << AW88399_WDT_CNT_START_BIT))
+
+#define AW88399_REABS_START_BIT	(3)
+#define AW88399_REABS_BITS_LEN		(1)
+#define AW88399_REABS_MASK		\
+	(~(((1<<AW88399_REABS_BITS_LEN)-1) << AW88399_REABS_START_BIT))
+
+#define AW88399_DSP_VOL_START_BIT	(8)
+#define AW88399_DSP_VOL_BITS_LEN	(8)
+#define AW88399_DSP_VOL_MASK		\
+	(~(((1<<AW88399_DSP_VOL_BITS_LEN)-1) << AW88399_DSP_VOL_START_BIT))
+
+#define AW883XX_DSP_NG_EN_START	(13)
+#define AW883XX_DSP_NG_EN_LEN		(1)
+#define AW883XX_DSP_NG_EN_MASK		\
+	(~(((1 << AW883XX_DSP_NG_EN_LEN) - 1) << AW883XX_DSP_NG_EN_START))
+#define AW883XX_DSP_NG_EN_DISABLE	(0)
+#define AW883XX_DSP_NG_EN_DISABLE_VALUE	\
+	(AW883XX_DSP_NG_EN_DISABLE << AW883XX_DSP_NG_EN_START)
+
+#define AW88399_VOLUME_STEP_DB			(64)
+#define AW88399_VOL_DEFAULT_VALUE		(0)
+#define AW88399_DSP_ODD_NUM_BIT_TEST		(0x5555)
+#define AW88399_EF_ISN_GESLP_SIGN_MASK		(~(1 << 9))
+#define AW88399_EF_ISN_GESLP_SIGN_NEG		(0xfe00)
+
+#define AW88399_EF_VSN_GESLP_SIGN_MASK		(~(1 << 9))
+#define AW88399_EF_VSN_GESLP_SIGN_NEG		(0xfe00)
+
+#define AW88399_TEM4_SIGN_MASK			(~(1 << 5))
+#define AW88399_TEM4_SIGN_NEG			(0xffc0)
+
+#define AW88399_ICABLK_FACTOR			(1)
+#define AW88399_VCABLK_FACTOR			(1)
+#define AW88399_VCABLK_DAC_FACTOR		(2)
+
+#define AW88399_VCALB_ADJ_FACTOR		(12)
+#define AW88399_VCALB_ACCURACY			(1 << 12)
+
+#define AW88399_ISCAL_FACTOR			(3125)
+#define AW88399_VSCAL_FACTOR			(18875)
+#define AW88399_ISCAL_DAC_FACTOR		(3125)
+#define AW88399_VSCAL_DAC_FACTOR		(12600)
+#define AW88399_CABL_BASE_VALUE		(1000)
+
+#define AW88399_DEV_DEFAULT_CH			(0)
+#define AW88399_DEV_DSP_CHECK_MAX		(5)
+#define AW88399_MAX_RAM_WRITE_BYTE_SIZE	(128)
+#define AW88399_DSP_RE_SHIFT			(12)
+#define AW88399_CALI_RE_MAX			(15000)
+#define AW88399_CALI_RE_MIN			(4000)
+#define AW_FW_ADDR_LEN				(4)
+#define AW88399_DSP_RE_TO_SHOW_RE(re, shift)	(((re) * (1000)) >> (shift))
+#define AW88399_SHOW_RE_TO_DSP_RE(re, shift)	(((re) << shift) / (1000))
+#define AW88399_CRC_CHECK_PASS_VAL		(0x4)
+
+#define AW88399_CRC_CFG_BASE_ADDR		(0xD80)
+#define AW88399_CRC_FW_BASE_ADDR		(0x4C0)
+#define AW88399_ACF_FILE			"aw88399_acf.bin"
+#define AW88399_DEV_SYSST_CHECK_MAX		(10)
+#define AW88399_CHIP_ID			0x2183
+
+#define AW88399_START_RETRIES			(5)
+#define AW88399_START_WORK_DELAY_MS		(0)
+
+enum {
+	AW_EF_AND_CHECK = 0,
+	AW_EF_OR_CHECK,
+};
+
+enum {
+	AW88399_DEV_VDSEL_DAC = 0,
+	AW88399_DEV_VDSEL_VSENSE = 32,
+};
+
+enum {
+	AW88399_DSP_CRC_NA = 0,
+	AW88399_DSP_CRC_OK = 1,
+};
+
+enum {
+	AW88399_DSP_FW_UPDATE_OFF = 0,
+	AW88399_DSP_FW_UPDATE_ON = 1,
+};
+
+enum {
+	AW88399_FORCE_UPDATE_OFF = 0,
+	AW88399_FORCE_UPDATE_ON = 1,
+};
+
+enum {
+	AW88399_1000_US = 1000,
+	AW88399_2000_US = 2000,
+	AW88399_3000_US = 3000,
+	AW88399_4000_US = 4000,
+};
+
+enum AW88399_DEV_STATUS {
+	AW88399_DEV_PW_OFF = 0,
+	AW88399_DEV_PW_ON,
+};
+
+enum AW88399_DEV_FW_STATUS {
+	AW88399_DEV_FW_FAILED = 0,
+	AW88399_DEV_FW_OK,
+};
+
+enum AW88399_DEV_MEMCLK {
+	AW88399_DEV_MEMCLK_OSC = 0,
+	AW88399_DEV_MEMCLK_PLL = 1,
+};
+
+enum AW88399_DEV_DSP_CFG {
+	AW88399_DEV_DSP_WORK = 0,
+	AW88399_DEV_DSP_BYPASS = 1,
+};
+
+enum {
+	AW88399_NOT_RCV_MODE = 0,
+	AW88399_RCV_MODE = 1,
+};
+
+enum {
+	AW88399_SYNC_START = 0,
+	AW88399_ASYNC_START,
+};
+
+struct aw_device;
+struct aw_container;
+struct aw_cali_desc;
+struct gpio_desc;
+struct i2c_client;
+struct regmap;
+
+struct aw88399 {
+	struct aw_device *aw_pa;
+	struct mutex lock;
+	struct gpio_desc *reset_gpio;
+	struct delayed_work start_work;
+	struct regmap *regmap;
+	struct aw_container *aw_cfg;
+
+	unsigned int check_val;
+	unsigned int crc_init_val;
+	unsigned int vcalb_init_val;
+	unsigned int dither_st;
+	bool bsts_unreliable;
+	bool fw_needs_reload;
+};
+
+int aw_dev_check_syspll(struct aw_device *aw_dev);
+void aw_dev_dsp_enable(struct aw_device *aw_dev, bool is_enable);
+int aw_dev_get_dsp_status(struct aw_device *aw_dev);
+int aw_dev_set_volume(struct aw_device *aw_dev, unsigned int value);
+int aw_dev_update_cali_re(struct aw_cali_desc *cali_desc);
+int aw88399_dev_get_prof_name(struct aw_device *aw_dev, int index, char **prof_name);
+void aw88399_dev_mute(struct aw_device *aw_dev, bool is_mute);
+void aw88399_dev_set_channel(struct aw88399 *aw88399, int channel);
+void aw88399_hw_reset(struct aw88399 *aw88399);
+int aw88399_init(struct aw88399 *aw88399, struct i2c_client *i2c, struct regmap *regmap);
+extern const struct regmap_config aw88399_remap_config;
+int aw88399_request_firmware_file(struct aw88399 *aw88399);
+void aw88399_start(struct aw88399 *aw88399, bool sync_start);
+void aw88399_startup_work(struct work_struct *work);
+int aw88399_stop(struct aw_device *aw_dev);
+
+#endif /* __SOUND_AW88399_H */
diff --git a/include/sound/hda-mlink.h b/include/sound/hda-mlink.h
index fed69998c93f..ba35f03576b9 100644
--- a/include/sound/hda-mlink.h
+++ b/include/sound/hda-mlink.h
@@ -9,6 +9,22 @@
 struct hdac_bus;
 struct hdac_ext_link;
 
+/**
+ * enum hda_bus_ml_link_type - mlink link type, used by SOF link DMA
+ *	allocator constraints (see struct sof_intel_hda_dev).
+ *
+ * @HDA_BUS_ML_LINK_HDA:  non-alt link, i.e. HDA codec or iDisp
+ * @HDA_BUS_ML_LINK_SDW:  alt link, SoundWire
+ * @HDA_BUS_ML_LINK_UAOL: alt link, USB Audio Offload
+ * @HDA_BUS_ML_LINK_OTHER: alt link, SSP or DMIC
+ */
+enum hda_bus_ml_link_type {
+	HDA_BUS_ML_LINK_HDA,
+	HDA_BUS_ML_LINK_SDW,
+	HDA_BUS_ML_LINK_UAOL,
+	HDA_BUS_ML_LINK_OTHER,
+};
+
 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA_MLINK)
 
 int hda_bus_ml_init(struct hdac_bus *bus);
@@ -49,11 +65,12 @@ int hdac_bus_eml_sdw_set_lsdiid(struct hdac_bus *bus, int sublink, int dev_num);
 int hdac_bus_eml_sdw_map_stream_ch(struct hdac_bus *bus, int sublink, int y,
 				   int channel_mask, int stream_id, int dir);
 
-void hda_bus_ml_put_all(struct hdac_bus *bus);
 void hda_bus_ml_reset_losidv(struct hdac_bus *bus);
 int hda_bus_ml_resume(struct hdac_bus *bus);
 int hda_bus_ml_suspend(struct hdac_bus *bus);
 
+enum hda_bus_ml_link_type hda_bus_ml_link_get_type(struct hdac_ext_link *hlink);
+
 struct hdac_ext_link *hdac_bus_eml_ssp_get_hlink(struct hdac_bus *bus);
 struct hdac_ext_link *hdac_bus_eml_dmic_get_hlink(struct hdac_bus *bus);
 struct hdac_ext_link *hdac_bus_eml_sdw_get_hlink(struct hdac_bus *bus);
@@ -169,11 +186,13 @@ hdac_bus_eml_sdw_map_stream_ch(struct hdac_bus *bus, int sublink, int y,
 	return 0;
 }
 
-static inline void hda_bus_ml_put_all(struct hdac_bus *bus) { }
 static inline void hda_bus_ml_reset_losidv(struct hdac_bus *bus) { }
 static inline int hda_bus_ml_resume(struct hdac_bus *bus) { return 0; }
 static inline int hda_bus_ml_suspend(struct hdac_bus *bus) { return 0; }
 
+static inline enum hda_bus_ml_link_type
+hda_bus_ml_link_get_type(struct hdac_ext_link *hlink) { return HDA_BUS_ML_LINK_HDA; }
+
 static inline struct hdac_ext_link *
 hdac_bus_eml_ssp_get_hlink(struct hdac_bus *bus) { return NULL; }
 
diff --git a/include/sound/sdca_asoc.h b/include/sound/sdca_asoc.h
index ca35d5a44370..d3024c3b38b9 100644
--- a/include/sound/sdca_asoc.h
+++ b/include/sound/sdca_asoc.h
@@ -25,6 +25,8 @@ struct snd_soc_dai_driver;
 struct snd_soc_dai_ops;
 struct snd_soc_dapm_route;
 struct snd_soc_dapm_widget;
+struct snd_soc_pcm_stream;
+struct sdca_entity;
 
 /* convenient macro to handle the mono volume in 7.8 fixed format representation */
 #define SDCA_SINGLE_Q78_TLV(xname, xreg, xmin, xmax, xstep, tlv_array) \
@@ -82,6 +84,11 @@ int sdca_asoc_populate_component(struct device *dev,
 				 struct snd_soc_dai_driver **dai_drv, int *num_dai_drv,
 				 const struct snd_soc_dai_ops *ops);
 
+int sdca_asoc_populate_rate_format(struct device *dev,
+				struct sdca_function_data *function,
+				struct sdca_entity *entity,
+				struct snd_soc_pcm_stream *stream);
+
 int sdca_asoc_set_constraints(struct device *dev, struct regmap *regmap,
 			      struct sdca_function_data *function,
 			      struct snd_pcm_substream *substream,
diff --git a/include/sound/sdca_fdl.h b/include/sound/sdca_fdl.h
index dc33927b82bd..bc3600cdd2ec 100644
--- a/include/sound/sdca_fdl.h
+++ b/include/sound/sdca_fdl.h
@@ -83,6 +83,10 @@ static inline int sdca_fdl_alloc_state(struct sdca_interrupt *interrupt)
 	return 0;
 }
 
+static inline void sdca_fdl_free_state(struct sdca_interrupt *interrupt)
+{
+}
+
 static inline int sdca_fdl_process(struct sdca_interrupt *interrupt)
 {
 	return 0;
diff --git a/include/sound/sdca_function.h b/include/sound/sdca_function.h
index b1489178b0ef..fb931ae735a2 100644
--- a/include/sound/sdca_function.h
+++ b/include/sound/sdca_function.h
@@ -1469,5 +1469,7 @@ struct sdca_control_range *sdca_selector_find_range(struct device *dev,
 struct sdca_cluster *sdca_id_find_cluster(struct device *dev,
 					  struct sdca_function_data *function,
 					  const int id);
+struct sdca_entity *sdca_find_entity_by_label(struct sdca_function_data *function,
+						     const char *entity_label);
 
 #endif
diff --git a/include/sound/simple_card_utils.h b/include/sound/simple_card_utils.h
index 915e6ae5f68d..bd8c3a033577 100644
--- a/include/sound/simple_card_utils.h
+++ b/include/sound/simple_card_utils.h
@@ -181,7 +181,7 @@ void simple_util_canonicalize_platform(struct snd_soc_dai_link_component *platfo
 void simple_util_canonicalize_cpu(struct snd_soc_dai_link_component *cpus,
 				  int is_single_links);
 
-void simple_util_clean_reference(struct snd_soc_card *card);
+void simple_util_clean_reference(struct simple_util_priv *priv);
 
 void simple_util_parse_convert(struct device_node *np, char *prefix,
 			       struct simple_util_data *data);
@@ -189,18 +189,37 @@ bool simple_util_is_convert_required(const struct simple_util_data *data);
 
 int simple_util_get_sample_fmt(struct simple_util_data *data);
 
-int simple_util_parse_routing(struct snd_soc_card *card,
-				      char *prefix);
-int simple_util_parse_widgets(struct snd_soc_card *card,
-				      char *prefix);
-int simple_util_parse_pin_switches(struct snd_soc_card *card,
-				   char *prefix);
+int simple_util_parse_property(struct simple_util_priv *priv,
+			       int (*func)(struct snd_soc_card *card, const char *propname),
+			       char *prefix, char *property);
+static inline int simple_util_parse_routing(struct simple_util_priv *priv, char *prefix)
+{
+	return simple_util_parse_property(priv, snd_soc_of_parse_audio_routing,
+					  prefix, "routing");
+}
+
+static inline int simple_util_parse_widgets(struct simple_util_priv *priv, char *prefix)
+{
+	return simple_util_parse_property(priv, snd_soc_of_parse_audio_simple_widgets,
+					  prefix, "widgets");
+}
+
+static inline int simple_util_parse_pin_switches(struct simple_util_priv *priv, char *prefix)
+{
+	return simple_util_parse_property(priv, snd_soc_of_parse_pin_switches,
+					  prefix, "pin-switches");
+}
+
+static inline int simple_util_parse_aux_devs(struct simple_util_priv *priv, char *prefix)
+{
+	return simple_util_parse_property(priv, snd_soc_of_parse_aux_devs,
+					  prefix, "aux-devs");
+}
 
 int simple_util_init_jack(struct snd_soc_card *card,
 			       struct simple_util_jack *sjack,
 			       int is_hp, char *prefix, char *pin);
-int simple_util_init_aux_jacks(struct simple_util_priv *priv,
-				char *prefix);
+int simple_util_init_aux_jacks(struct snd_soc_card *card, char *prefix);
 int simple_util_init_priv(struct simple_util_priv *priv,
 			       struct link_info *li);
 void simple_util_remove(struct platform_device *pdev);
diff --git a/include/sound/soc_sdw_utils.h b/include/sound/soc_sdw_utils.h
index 79c21966220b..9b28e9aef4f1 100644
--- a/include/sound/soc_sdw_utils.h
+++ b/include/sound/soc_sdw_utils.h
@@ -44,6 +44,18 @@
 
 struct asoc_sdw_codec_info;
 
+struct asoc_sdw_mc_private {
+	struct snd_soc_card card;
+	struct snd_soc_jack sdw_headset;
+	struct device *headset_codec_dev; /* only one headset per card */
+	struct device *amp_dev1, *amp_dev2;
+	bool append_dai_type;
+	bool ignore_internal_dmic;
+	void *private;
+	unsigned long mc_quirk;
+	int codec_info_list_count;
+};
+
 struct asoc_sdw_dai_info {
 	const bool direction[2]; /* playback & capture support */
 	const char *codec_name;
@@ -88,25 +100,13 @@ struct asoc_sdw_codec_info {
 
 	int (*codec_card_late_probe)(struct snd_soc_card *card);
 
-	int  (*count_sidecar)(struct snd_soc_card *card,
+	int  (*count_sidecar)(struct asoc_sdw_mc_private *ctx,
 			      int *num_dais, int *num_devs);
 	int  (*add_sidecar)(struct snd_soc_card *card,
 			    struct snd_soc_dai_link **dai_links,
 			    struct snd_soc_codec_conf **codec_conf);
 };
 
-struct asoc_sdw_mc_private {
-	struct snd_soc_card card;
-	struct snd_soc_jack sdw_headset;
-	struct device *headset_codec_dev; /* only one headset per card */
-	struct device *amp_dev1, *amp_dev2;
-	bool append_dai_type;
-	bool ignore_internal_dmic;
-	void *private;
-	unsigned long mc_quirk;
-	int codec_info_list_count;
-};
-
 struct asoc_sdw_endpoint {
 	struct list_head list;
 
@@ -182,7 +182,8 @@ struct asoc_sdw_dailink *asoc_sdw_find_dailink(struct asoc_sdw_dailink *dailinks
 					       const struct snd_soc_acpi_endpoint *new);
 int asoc_sdw_get_dai_type(u32 type);
 
-int asoc_sdw_parse_sdw_endpoints(struct snd_soc_card *card,
+int asoc_sdw_parse_sdw_endpoints(struct device *dev,
+				 struct asoc_sdw_mc_private *ctx,
 				 struct snd_soc_aux_dev *soc_aux,
 				 struct asoc_sdw_dailink *soc_dais,
 				 struct asoc_sdw_endpoint *soc_ends,
@@ -235,7 +236,7 @@ int asoc_sdw_es9356_amp_init(struct snd_soc_card *card,
 int asoc_sdw_es9356_exit(struct snd_soc_card *card, struct snd_soc_dai_link *dai_link);
 
 /* CS AMP support */
-int asoc_sdw_bridge_cs35l56_count_sidecar(struct snd_soc_card *card,
+int asoc_sdw_bridge_cs35l56_count_sidecar(struct asoc_sdw_mc_private *ctx,
 					  int *num_dais, int *num_devs);
 int asoc_sdw_bridge_cs35l56_add_sidecar(struct snd_soc_card *card,
 					struct snd_soc_dai_link **dai_links,
diff --git a/include/sound/sof/dai-amd.h b/include/sound/sof/dai-amd.h
index 59cd014392c1..e2107da6558f 100644
--- a/include/sound/sof/dai-amd.h
+++ b/include/sound/sof/dai-amd.h
@@ -18,6 +18,7 @@ struct sof_ipc_dai_acp_params {
 	uint32_t fsync_rate;    /* FSYNC frequency in Hz */
 	uint32_t tdm_slots;
 	uint32_t tdm_mode;
+	uint32_t format;
 } __packed;
 
 /* ACPDMIC Configuration Request - SOF_IPC_DAI_AMD_CONFIG */
diff --git a/include/sound/sof/dai.h b/include/sound/sof/dai.h
index 36809f712723..e3fe492e78f5 100644
--- a/include/sound/sof/dai.h
+++ b/include/sound/sof/dai.h
@@ -90,6 +90,8 @@ enum sof_ipc_dai_type {
 	SOF_DAI_AMD_HS_VIRTUAL,		/**< AMD ACP HS VIRTUAL */
 	SOF_DAI_IMX_MICFIL,		/** < i.MX MICFIL PDM */
 	SOF_DAI_AMD_SDW,		/**< AMD ACP SDW */
+	SOF_DAI_INTEL_UAOL,		/**< Intel UAOL */
+	SOF_DAI_AMD_I2S,		/**< AMD ACP I2S */
 };
 
 /* general purpose DAI configuration */
@@ -121,6 +123,7 @@ struct sof_ipc_dai_config {
 		struct sof_ipc_dai_mtk_afe_params afe;
 		struct sof_ipc_dai_micfil_params micfil;
 		struct sof_ipc_dai_acp_sdw_params acp_sdw;
+		struct sof_ipc_dai_acp_params acp_i2s;
 	};
 } __packed;
 
diff --git a/include/sound/sof/header.h b/include/sound/sof/header.h
index 4e406dc22f31..6c2c3a5fc90d 100644
--- a/include/sound/sof/header.h
+++ b/include/sound/sof/header.h
@@ -179,7 +179,7 @@ struct sof_ipc_compound_hdr {
 	uint32_t count;		/**< count of 0 means end of compound sequence */
 }  __packed;
 
-/**
+/*
  * OOPS header architecture specific data.
  */
 struct sof_ipc_dsp_oops_arch_hdr {
@@ -187,7 +187,7 @@ struct sof_ipc_dsp_oops_arch_hdr {
 	uint32_t totalsize;	/* Total size of oops message */
 }  __packed;
 
-/**
+/*
  * OOPS header platform specific data.
  */
 struct sof_ipc_dsp_oops_plat_hdr {
diff --git a/include/sound/sof/ipc4/header.h b/include/sound/sof/ipc4/header.h
index 4554e5e8cab5..cea3d9453b84 100644
--- a/include/sound/sof/ipc4/header.h
+++ b/include/sound/sof/ipc4/header.h
@@ -187,6 +187,10 @@ enum sof_ipc4_pipeline_state {
 #define SOF_IPC4_GLB_PIPE_EXT_CORE_ID_MASK	GENMASK(23, 20)
 #define SOF_IPC4_GLB_PIPE_EXT_CORE_ID(x)	((x) << SOF_IPC4_GLB_PIPE_EXT_CORE_ID_SHIFT)
 
+#define SOF_IPC4_GLB_PIPE_PAYLOAD_SHIFT		29
+#define SOF_IPC4_GLB_PIPE_PAYLOAD_MASK		BIT(29)
+#define SOF_IPC4_GLB_PIPE_PAYLOAD(x)		((x) << SOF_IPC4_GLB_PIPE_PAYLOAD_SHIFT)
+
 /* pipeline set state ipc msg */
 #define SOF_IPC4_GLB_PIPE_STATE_ID_SHIFT		16
 #define SOF_IPC4_GLB_PIPE_STATE_ID_MASK		GENMASK(23, 16)
@@ -536,12 +540,63 @@ enum sof_ipc4_notification_type {
 	SOF_IPC4_NOTIFY_TYPE_LAST,
 };
 
+enum sof_ipc4_resource_type {
+	SOF_IPC4_MODULE_INSTANCE,
+	SOF_IPC4_PIPELINE,
+	SOF_IPC4_GATEWAY,
+	SOF_IPC4_EDF_TASK,
+	SOF_IPC4_INVALID_RESOURCE_TYPE,
+};
+
+enum sof_ipc4_event_type {
+	/* Underrun detected by the Mixer */
+	SOF_IPC4_MIXER_UNDERRUN_DETECTED = 1,
+	/* Error caught during data processing */
+	SOF_IPC4_PROCESS_DATA_ERROR = 3,
+	/* Underrun detected by gateway. */
+	SOF_IPC4_GATEWAY_UNDERRUN_DETECTED = 6,
+	/* Overrun detected by gateway */
+	SOF_IPC4_GATEWAY_OVERRUN_DETECTED,
+};
+
+/**
+ * struct sof_ipc4_process_data_error_event_data - process data error event payload
+ * @error_code: Error code returned by data processing function
+ */
+struct sof_ipc4_process_data_error_event_data {
+	uint32_t error_code;
+};
+
+/**
+ * struct sof_ipc4_mixer_underrun_event_data - mixer underrun event payload
+ * @eos_flag: Indicates EndOfStream
+ * @data_mixed: Data processed by module (in bytes)
+ * @expected_data_mixed: Expected data to be processed (in bytes)
+ */
+struct sof_ipc4_mixer_underrun_event_data {
+	uint32_t eos_flag;
+	uint32_t data_mixed;
+	uint32_t expected_data_mixed;
+};
+
+/**
+ * union sof_ipc4_resource_event_data - resource event specific payload
+ * @dws: Raw event data payload as six dwords
+ * @process_data_error: SOF_IPC4_PROCESS_DATA_ERROR payload
+ * @mixer_underrun: SOF_IPC4_MIXER_UNDERRUN_DETECTED payload
+ */
+union sof_ipc4_resource_event_data {
+	uint32_t dws[6];
+	struct sof_ipc4_process_data_error_event_data process_data_error;
+	struct sof_ipc4_mixer_underrun_event_data mixer_underrun;
+};
+
 struct sof_ipc4_notify_resource_data {
 	uint32_t resource_type;
 	uint32_t resource_id;
 	uint32_t event_type;
 	uint32_t reserved;
-	uint32_t data[6];
+	union sof_ipc4_resource_event_data data;
 } __packed __aligned(4);
 
 #define SOF_IPC4_DEBUG_DESCRIPTOR_SIZE		12 /* 3 x u32 */
@@ -654,11 +709,81 @@ enum sof_ipc4_mod_init_ext_obj_id {
 	SOF_IPC4_MOD_INIT_DATA_ID_MAX = SOF_IPC4_MOD_INIT_DATA_ID_DP_DATA,
 };
 
-/* DP module memory configuration data object for ext_init object array */
+/* DP module memory configuration data object for object array */
 struct sof_ipc4_mod_init_ext_dp_memory_data {
+	u32 domain_id;			/* userspace domain ID */
+	u32 stack_bytes;		/* required stack size in bytes */
+	u32 heap_bytes;		/* required heap size in bytes */
+} __packed __aligned(4);
+
+/*
+ * This set of macros are very similar to the set above, but these are
+ * for building payload to SOF_IPC4_GLB_CREATE_PIPELINE message.
+ *
+ * Macros for creating struct sof_ipc4_glb_pipe_payload payload with
+ * its associated data. struct sof_ipc4_glb_pipe_payload should be the
+ * first piece of payload following SOF_IPC4_GLB_CREATE_PIPELINE msg,
+ * and its existence is indicated with SOF_IPC4_GLB_PIPE_PAYLOAD bit.
+ *
+ * The macros below apply to sof_ipc4_glb_pipe_payload.word0
+ */
+#define SOF_IPC4_GLB_PIPE_PAYLOAD_WORDS_SHIFT	0
+#define SOF_IPC4_GLB_PIPE_PAYLOAD_WORDS_MASK	GENMASK(23, 0)
+#define SOF_IPC4_GLB_PIPE_PAYLOAD_WORDS(x)	((x) << SOF_IPC4_GLB_PIPE_PAYLOAD_WORDS_SHIFT)
+
+#define SOF_IPC4_GLB_PIPE_EXT_OBJ_ARRAY_SHIFT	24
+#define SOF_IPC4_GLB_PIPE_EXT_OBJ_ARRAY_MASK	BIT(24)
+#define SOF_IPC4_GLB_PIPE_EXT_OBJ_ARRAY(x)	((x) << SOF_IPC4_GLB_PIPE_EXT_OBJ_ARRAY_SHIFT)
+
+struct sof_ipc4_glb_pipe_payload {
+	u32 word0;
+	u32 rsvd1;
+	u32 rsvd2;
+} __packed __aligned(4);
+
+/*
+ * SOF_IPC4_GLB_CREATE_PIPELINE payload may be followed by arbitrary
+ * number of object array objects. SOF_IPC4_GLB_PIPE_EXT_OBJ_ARRAY-bit
+ * indicates that an array object follows struct
+ * sof_ipc4_glb_pipe_payload.
+ *
+ * The object header's SOF_IPC4_GLB_PIPE_EXT_OBJ_LAST-bit in struct
+ * sof_ipc4_glb_pipe_ext_object indicates if the array is continued
+ * with another object. The header has also fields to identify the
+ * object, SOF_IPC4_GLB_PIPE_EXT_OBJ_ID, and to indicate the object's
+ * size in 32-bit words, SOF_IPC4_GLB_PIPE_EXT_OBJ_WORDS, not
+ * including the header itself.
+ *
+ * The macros below apply to sof_ipc4_glb_pipe_ext_object.header
+ */
+#define SOF_IPC4_GLB_PIPE_EXT_OBJ_LAST_SHIFT	0
+#define SOF_IPC4_GLB_PIPE_EXT_OBJ_LAST_MASK	BIT(0)
+#define SOF_IPC4_GLB_PIPE_EXT_OBJ_LAST(x)	((x) << SOF_IPC4_GLB_PIPE_EXT_OBJ_LAST_SHIFT)
+
+#define SOF_IPC4_GLB_PIPE_EXT_OBJ_ID_SHIFT	1
+#define SOF_IPC4_GLB_PIPE_EXT_OBJ_ID_MASK	GENMASK(15, 1)
+#define SOF_IPC4_GLB_PIPE_EXT_OBJ_ID(x)		((x) << SOF_IPC4_GLB_PIPE_EXT_OBJ_ID_SHIFT)
+
+#define SOF_IPC4_GLB_PIPE_EXT_OBJ_WORDS_SHIFT	16
+#define SOF_IPC4_GLB_PIPE_EXT_OBJ_WORDS_MASK	GENMASK(31, 16)
+#define SOF_IPC4_GLB_PIPE_EXT_OBJ_WORDS(x)	((x) << SOF_IPC4_GLB_PIPE_EXT_OBJ_WORDS_SHIFT)
+
+struct sof_ipc4_glb_pipe_ext_object {
+	u32 header;
+	u32 data[];
+} __packed __aligned(4);
+
+enum sof_ipc4_glb_pipe_ext_obj_id {
+	SOF_IPC4_GLB_PIPE_DATA_ID_INVALID = 0,
+	SOF_IPC4_GLB_PIPE_DATA_ID_MEM_DATA,
+	SOF_IPC4_GLB_PIPE_DATA_ID_MAX = SOF_IPC4_GLB_PIPE_DATA_ID_MEM_DATA,
+};
+
+/* Pipeline memory configuration data object for ext_init object array */
+struct sof_ipc4_glb_pipe_ext_obj_memory_data {
 	u32 domain_id;		/* userspace domain ID */
-	u32 stack_bytes;	/* stack size in bytes, 0 means default size */
-	u32 heap_bytes;		/* stack size in bytes, 0 means default size */
+	u32 stack_bytes;	/* stack size in bytes */
+	u32 heap_bytes;		/* heap size in bytes */
 } __packed __aligned(4);
 
 /** @}*/
diff --git a/include/sound/tlv320aic32x4.h b/include/sound/tlv320aic32x4.h
deleted file mode 100644
index b779d671a995..000000000000
--- a/include/sound/tlv320aic32x4.h
+++ /dev/null
@@ -1,43 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * tlv320aic32x4.h  --  TLV320AIC32X4 Soc Audio driver platform data
- *
- * Copyright 2011 Vista Silicon S.L.
- *
- * Author: Javier Martin <javier.martin@vista-silicon.com>
- */
-
-#ifndef _AIC32X4_PDATA_H
-#define _AIC32X4_PDATA_H
-
-#define AIC32X4_PWR_MICBIAS_2075_LDOIN		0x00000001
-#define AIC32X4_PWR_AVDD_DVDD_WEAK_DISABLE	0x00000002
-#define AIC32X4_PWR_AIC32X4_LDO_ENABLE		0x00000004
-#define AIC32X4_PWR_CMMODE_LDOIN_RANGE_18_36	0x00000008
-#define AIC32X4_PWR_CMMODE_HP_LDOIN_POWERED	0x00000010
-
-#define AIC32X4_MICPGA_ROUTE_LMIC_IN2R_10K	0x00000001
-#define AIC32X4_MICPGA_ROUTE_RMIC_IN1L_10K	0x00000002
-
-/* GPIO API */
-#define AIC32X4_MFPX_DEFAULT_VALUE	0xff
-
-#define AIC32X4_MFP1_DIN_DISABLED	0
-#define AIC32X4_MFP1_DIN_ENABLED	0x2
-#define AIC32X4_MFP1_GPIO_IN		0x4
-
-#define AIC32X4_MFP2_GPIO_OUT_LOW	0x0
-#define AIC32X4_MFP2_GPIO_OUT_HIGH	0x1
-
-#define AIC32X4_MFP_GPIO_ENABLED	0x4
-
-#define AIC32X4_MFP5_GPIO_DISABLED	0x0
-#define AIC32X4_MFP5_GPIO_INPUT		0x8
-#define AIC32X4_MFP5_GPIO_OUTPUT	0xc
-#define AIC32X4_MFP5_GPIO_OUT_LOW	0x0
-#define AIC32X4_MFP5_GPIO_OUT_HIGH	0x1
-
-struct aic32x4_setup_data {
-	unsigned int gpio_func[5];
-};
-#endif
diff --git a/include/uapi/sound/sof/tokens.h b/include/uapi/sound/sof/tokens.h
index f4a7baadb44d..d42adbef0478 100644
--- a/include/uapi/sound/sof/tokens.h
+++ b/include/uapi/sound/sof/tokens.h
@@ -111,8 +111,8 @@
 
 #define SOF_TKN_COMP_SCHED_DOMAIN		418
 #define SOF_TKN_COMP_DOMAIN_ID			419
-#define SOF_TKN_COMP_HEAP_BYTES_REQUIREMENT	420
-#define SOF_TKN_COMP_STACK_BYTES_REQUIREMENT	421
+#define SOF_TKN_COMP_STACK_BYTES_REQUIREMENT	420
+#define SOF_TKN_COMP_HEAP_BYTES_REQUIREMENT	421
 
 /* SSP */
 #define SOF_TKN_INTEL_SSP_CLKS_CONTROL		500
@@ -223,6 +223,7 @@
 #define SOF_TKN_AMD_ACPI2S_RATE			1700
 #define SOF_TKN_AMD_ACPI2S_CH			1701
 #define SOF_TKN_AMD_ACPI2S_TDM_MODE		1702
+#define SOF_TKN_AMD_ACPI2S_FORMAT		1703
 
 /* MICFIL PDM */
 #define SOF_TKN_IMX_MICFIL_RATE			2000