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| author | Jia Wang <wangjia@ultrarisc.com> | 2026-07-20 08:38:05 +0800 |
|---|---|---|
| committer | Brian Masney <bmasney@redhat.com> | 2026-07-28 11:25:29 -0400 |
| commit | e1d57ac7fe53dc52bb8aab9db59008c7fec8d863 (patch) | |
| tree | 4bc02e9eb426a79df0fc9289ef1e02b4dcb335d0 /include | |
| parent | f600fbdb2093b18f2e21401ba7c6325e4d2b5b16 (diff) | |
| download | linux-e1d57ac7fe53dc52bb8aab9db59008c7fec8d863.tar.gz linux-e1d57ac7fe53dc52bb8aab9db59008c7fec8d863.zip | |
dt-bindings: clock: ultrarisc: Add DP1000 Clock Controller
Add doc for the clock controller on the UltraRISC DP1000 RISC-V SoC.
Signed-off-by: Jia Wang <wangjia@ultrarisc.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Brian Masney <bmasney@redhat.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/dt-bindings/clock/ultrarisc,dp1000-clk.h | 27 |
1 files changed, 27 insertions, 0 deletions
diff --git a/include/dt-bindings/clock/ultrarisc,dp1000-clk.h b/include/dt-bindings/clock/ultrarisc,dp1000-clk.h new file mode 100644 index 000000000000..751125f99965 --- /dev/null +++ b/include/dt-bindings/clock/ultrarisc,dp1000-clk.h @@ -0,0 +1,27 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ +#ifndef _DT_BINDINGS_CLOCK_ULTRARISC_DP1000_CLK_H +#define _DT_BINDINGS_CLOCK_ULTRARISC_DP1000_CLK_H + +#define DP1000_CLK_SYSPLL 0 +#define DP1000_CLK_SYSPLL_DIV2 1 +#define DP1000_CLK_SUBSYS 2 +#define DP1000_CLK_GMAC 3 +#define DP1000_CLK_UART_ROOT 4 +#define DP1000_CLK_I2C_ROOT 5 +#define DP1000_CLK_SPI_ROOT 6 +#define DP1000_CLK_PCIE_DBI 7 +#define DP1000_CLK_PCIEX4_CORE 8 +#define DP1000_CLK_PCIEX16_CORE 9 +#define DP1000_CLK_PCIE_AUX 10 +#define DP1000_CLK_UART0 11 +#define DP1000_CLK_UART1 12 +#define DP1000_CLK_UART2 13 +#define DP1000_CLK_UART3 14 +#define DP1000_CLK_I2C0 15 +#define DP1000_CLK_I2C1 16 +#define DP1000_CLK_I2C2 17 +#define DP1000_CLK_I2C3 18 +#define DP1000_CLK_SPI0 19 +#define DP1000_CLK_SPI1 20 + +#endif /* _DT_BINDINGS_CLOCK_ULTRARISC_DP1000_CLK_H */ |