diff options
| author | Jia Wang <wangjia@ultrarisc.com> | 2026-07-31 09:14:28 +0800 |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2026-08-10 19:43:23 -0500 |
| commit | 3d4b40fc881ea3f502d499564ab56987515cf6e2 (patch) | |
| tree | a76c1ee069ef8a2443fc66701faff48a4964ee8e /tools/lib/python | |
| parent | dc59e4fea9d83f03bad6bddf3fa2e52491777482 (diff) | |
| download | linux-3d4b40fc881ea3f502d499564ab56987515cf6e2.tar.gz linux-3d4b40fc881ea3f502d499564ab56987515cf6e2.zip | |
dt-bindings: PCI: ultrarisc: Add required DP1000 PCIe clocks
Require DP1000 PCIe controller nodes to provide clocks and clock-names,
using the standard DesignWare clock names "core", "dbi", and "aux".
Fixes: d9ff07f45955 ("dt-bindings: PCI: Add UltraRISC DP1000 PCIe controller")
Signed-off-by: Jia Wang <wangjia@ultrarisc.com>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://patch.msgid.link/20260731-ultrarisc-pci-clk-v4-1-d738b491e49a@ultrarisc.com
Diffstat (limited to 'tools/lib/python')
0 files changed, 0 insertions, 0 deletions