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| author | Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com> | 2026-07-29 10:22:28 +0530 |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2026-07-31 12:08:22 -0500 |
| commit | 3fc686d550f6dba3f4fd53aec173b6dee15e7f98 (patch) | |
| tree | f6a40d2b052ccbe9ebfedd12a755a034601ac006 /tools/lib/python | |
| parent | 36637958726a4bbc630c0848eb3eb07cbfae89c2 (diff) | |
| download | linux-3fc686d550f6dba3f4fd53aec173b6dee15e7f98.tar.gz linux-3fc686d550f6dba3f4fd53aec173b6dee15e7f98.zip | |
PCI/ERR: Add support for resetting the Root Ports in a platform-specific way
Some host bridge devices require resetting the Root Ports in a platform
specific way to recover them from error conditions such as Fatal AER
errors, Link Down, etc. Introduce pci_host_bridge::reset_root_port()
callback and call it from pcibios_reset_secondary_bus() if available. Also,
save the Root Port config space before reset and restore it afterwards.
The .reset_root_port() callback is responsible for resetting the given Root
Port referenced by the 'pci_dev' pointer in a platform-specific way and
bring it back to the working state if possible. If any error occurs during
the reset operation, relevant errno should be returned.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Tested-by: Brian Norris <briannorris@chromium.org>
Tested-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>
Tested-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Link: https://patch.msgid.link/20260729-pci-port-reset-v9-2-53570b92064d@oss.qualcomm.com
Diffstat (limited to 'tools/lib/python')
0 files changed, 0 insertions, 0 deletions