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8 daysReplace <linux/mod_devicetable.h> by more specific <linux/device-id/*.h> (c ↵Uwe Kleine-König (The Capable Hub)
files) Replace the #include of <linux/mod_devicetable.h> by the more specific <linux/device-id/*.h> where applicable. For most cases the include can be dropped completely, only a few drivers need one or two headers added. Acked-by: Danilo Krummrich <dakr@kernel.org> Acked-by: Takashi Sakamoto <o-takashi@sakamocchi.jp> Acked-by: Bjorn Helgaas <bhelgaas@google.com> Link: https://patch.msgid.link/1a3f2007c5c5dcf555c09a4035ce3ae8ef1b6c49.1782808461.git.u.kleine-koenig@baylibre.com Signed-off-by: Uwe Kleine-König (The Capable Hub) <u.kleine-koenig@baylibre.com>
2026-06-22Merge tag 'char-misc-7.2-rc1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc Pull misc driver updates from Greg KH: "Here is the big set of char, misc, iio, fpga, and other small driver subsystems changes for 7.2-rc1. Lots of little stuff in here, the majority being of course the IIO driver updates, as a list they are: - IIO driver updates and additions - GPIB driver bugfixes and cleanups - Android binder driver updates (rust and C version) - counter driver updates - MHI driver updates - mei driver updates - w1 driver updates - interconnect driver updates - Comedi driver fixes and updates - some obsolete char drivers removed (applicom and dtlk) - hwtracing driver updates - other tiny driver updates All of these have been in linux-next for a while with no reported issues" * tag 'char-misc-7.2-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (406 commits) w1: ds2482: Use named initializers for arrays of i2c_device_data firmware: stratix10-svc: Add support to query Arm Trusted Firmware (ATF) version firmware: stratix10-rsu: avoid blocking reboot_image sysfs when busy coresight: ultrasoc-smb: Fix OOB write in smb_sync_perf_buffer() iio: adc: nxp-sar-adc: harden buffer ISR against per-channel read failure iio: chemical: scd30: Replace manual locking with RAII locking iio: light: tsl2591: remove unneeded tsl2591_compatible_als_persist_cycle() iio: dac: ad5686: create bus ops struct iio: dac: ad5686: cleanup doc header of local structs iio: dac: ad5686: add control_sync() for single-channel devices iio: dac: ad5686: add helpers to handle powerdown masks iio: dac: ad5686: add of_match table to the spi driver iio: dac: ad5686: drop enum id iio: dac: ad5686: remove redundant register definition iio: dac: ad5686: refactor include headers iio: adc: ad4080: fix AD4880 chip ID iio: light: veml3328: add support for new device dt-bindings: iio: light: veml6030: add veml3328 fpga: microchip-spi: fix zero header_size OOB read in mpf_ops_parse_header() fpga: dfl-afu: validate DMA mapping length in afu_dma_map_region() ...
2026-06-17Merge tag 'bitmap-for-7.2' of https://github.com/norov/linuxLinus Torvalds
Pull bitmap updates from Yury Norov: "This includes the new FIELD_GET_SIGNED() helper, bitmap_print_to_pagebuf() removal, RISCV/bitrev support, and a couple cleanups. - new handy helper FIELD_GET_SIGNED() (Yury) - arch test_and_set_bit_lock() and clear_bit_unlock() cleanup (Randy) - __bf_shf() simplification (Yury) - bitmap_print_to_pagebuf() removal (Yury) - RISCV/bitrev conditional support (Jindie, Yury)" * tag 'bitmap-for-7.2' of https://github.com/norov/linux: MAINTAINERS: BITOPS: include bitrev.[ch] arch/riscv: Add bitrev.h file to support rev8 and brev8 bitops: Define generic___bitrev8/16/32 for reuse lib/bitrev: Introduce GENERIC_BITREVERSE arch: select HAVE_ARCH_BITREVERSE conditionally on BITREVERSE bitmap: fix find helper documentation bitmap: drop bitmap_print_to_pagebuf() cpumask: switch cpumap_print_to_pagebuf() to using scnprintf() bitfield: wire __bf_shf to __builtin_ctzll bitops: use common function parameter names ptp: switch to using FIELD_GET_SIGNED() rtc: rv3032: switch to using FIELD_GET_SIGNED() wifi: rtw89: switch to using FIELD_GET_SIGNED() iio: mcp9600: switch to using FIELD_GET_SIGNED() iio: pressure: bmp280: switch to using FIELD_GET_SIGNED() iio: magnetometer: yas530: switch to using FIELD_GET_SIGNED() iio: intel_dc_ti_adc: switch to using FIELD_GET_SIGNED() x86/extable: switch to using FIELD_GET_SIGNED() bitfield: add FIELD_GET_SIGNED()
2026-06-14Merge tag 'iio-fixes-for-7.1b' of ↵Greg Kroah-Hartman
ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/jic23/iio into char-misc-next IIO: 2nd set of fixes for the 7.1 cycle. Usual mixed bag of ancient issues and the recently introduced. Various drivers - Ensure use of simple_write_to_buffer() in debugfs callbacks doesn't result in reading off the end of intended data by checking the position is always 0. buffer/hw-consumer - Ensure scan_mask is freed on buffer release. acpi-als - Check ACPI_COMPANION() against NULL to close corner case where a driver is overridden. adi,ad4062 - Add GPIOLIB dependency to avoid undefined ref to gpiochip_get_data() adi.ad7768-1 - Add GPIOLIB dependency to avoid several undefined functions. adi,ad2s1210 - Ensure possible recovery path if a read fails in the interrupt handler. bosch,bmg160 - Increase sleep on startup to ensure device is ready. bosch,bmp280 - Ensure buffer pushed to kfifo is zeroed to avoid leaking uninitialized stack data to userspace. dyna-image,al3010 - Fix refactor that stopped reading one of the two measurement registers. dyna-image,al3320a - Fix refactor that stopped reading one of the two measurement registers. qcom,spmi-iadc - Ensure disable_irq_wake() is called on remove path. sensiron,scd30 - Fix a sign extension bug. st,vl5310x - Ensure possible recovery path if a read fails in the interrupt handler. ti,adc1298 - Bounds check for pga_settings index. Hardening against device returning unexpected values. ti,tmp006 - Ensure trigger correctly released on remove path. vishay,veml6030 - Fix incorrect channel type in events. vishay,veml6074 - Bounds check for veml6075_it_ms. Hardening against device returning unexpected values. * tag 'iio-fixes-for-7.1b' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/jic23/iio: (23 commits) iio: adc: ad_sigma_delta: fix clear_pending_event for registerless devices iio: adc: ad_sigma_delta: fix CS held asserted and state leaks iio: light: opt3001: fix missing state reset on timeout iio: chemical: scd30: Cleanup initializations and fix sign-extension bug iio: core: fix uninitialized data in debugfs iio: backend: fix uninitialized data in debugfs iio: dac: ad3552r-hs: fix uninitialized data ni ad3552r_hs_write_data_source() iio: adc: qcom-spmi-iadc: balance enable_irq_wake() on driver unbind iio: light: al3320a: read both ALS ADC registers again iio: light: al3010: read both ALS ADC registers again iio: temperature: tmp006: use devm_iio_trigger_register iio: buffer: hw-consumer: free scan_mask on buffer release iio: adc: ad7768-1: Select GPIOLIB iio: light: veml6030: fix channel type when pushing events iio: light: acpi-als: Check ACPI_COMPANION() against NULL iio: resolver: ad2s1210: notify trigger and clear state on fault read error iio: proximity: vl53l0x: notify trigger and clear IRQ on error paths iio: gyro: bmg160: wait full startup time after mode change at probe iio: gyro: bmg160: bail out when bandwidth/filter is not in table iio: pressure: bmp280: zero-init bmp580 trigger handler buffer ...
2026-06-03iio: adc: nxp-sar-adc: harden buffer ISR against per-channel read failureStepan Ionichev
nxp_sar_adc_isr_buffer() bails on the first channel-read failure without calling iio_trigger_notify_done(), so the trigger use_count is left incremented and iio_trigger_poll_chained() drops subsequent dispatches until the device is rebound. Reaching this path means a state machine has gone wrong (driver bug or the SAR ADC in an unexpected state) rather than a transient bus issue, so this is hardening rather than a bug fix. If the underlying condition persists the device is wedged and needs an unbind anyway. Call iio_trigger_notify_done() on the error exit too, matching the success path. The nxp_sar_adc_read_notify() duplication is intentional and avoids a goto label for a two-line bail-out, as suggested by David. Signed-off-by: Stepan Ionichev <sozdayvek@gmail.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2026-06-02Merge tag 'v7.1-rc6' into workJonathan Cameron
Linux 7.1-rc6
2026-06-02iio: adc: ad4080: fix AD4880 chip IDAntoniu Miclaus
The AD4880 chip ID was incorrectly set to 0x0750. According to the datasheet, the product ID registers read 0x00 (PRODUCT_ID_H) and 0x59 (PRODUCT_ID_L), giving a combined chip ID of 0x0059. Fix the value to match the actual hardware. Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com> Reviewed-by: Joshua Crofts <joshua.crofts1@gmail.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2026-05-31iio: adc: ad4691: add oversampling supportRadu Sabau
Add oversampling ratio (OSR) support for CNV burst mode. The accumulator depth register (ACC_DEPTH_IN(0)) is programmed with the selected OSR at buffer enable time and before each single-shot read. Supported OSR values: 1, 2, 4, 8, 16, 32. Introduce AD4691_MANUAL_CHANNEL() for manual mode channels, which do not expose the oversampling_ratio attribute since OSR is not applicable in that mode. A separate manual_channels array is added to struct ad4691_channel_info and selected at probe time. The OSR is shared across all channels (in_voltage_sampling_frequency and in_voltage_oversampling_ratio are info_mask_shared_by_all) because the chip has one internal oscillator and a single accumulator depth register (ACC_DEPTH_IN(0)) for all channels. in_voltage_sampling_frequency represents the effective output rate, defined as osc_freq / osr. Writing it computes needed_osc = freq * osr and snaps down to the largest oscillator table entry that satisfies both osc <= needed_osc and osc % osr == 0, guaranteeing an exact integer read-back. The result is stored in target_osc_freq_Hz and written to OSC_FREQ_REG at buffer enable and single-shot time, so sampling_frequency and oversampling_ratio can be set in any order. in_voltage_sampling_frequency_available is precomputed at probe for each OSR value, listing only oscillator table entries that divide evenly by that OSR, expressed as effective rates (osc_freq / osr). The list becomes sparser as OSR increases, capping at max_rate / osr. read_avail picks the precomputed list for the current OSR, making the returned pointer stable and race-free. Writing oversampling_ratio stores the new shared OSR and snaps target_osc_freq_Hz to the largest oscillator table entry that is both <= old_effective_rate * new_osr and evenly divisible by new_osr. This preserves an integer read-back of in_voltage_sampling_frequency after the OSR change while keeping the oscillator as close as possible to the previous effective rate. OSR defaults to 1 (no accumulation). Signed-off-by: Radu Sabau <radu.sabau@analog.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2026-05-31iio: adc: ad4691: add SPI offload supportRadu Sabau
Add SPI offload support to enable DMA-based, CPU-independent data acquisition using the SPI Engine offload framework. When an SPI offload is available (devm_spi_offload_get() succeeds), the driver registers a DMA engine IIO buffer and uses dedicated buffer setup operations. If no offload is available the existing software triggered buffer path is used unchanged. Both CNV Burst Mode and Manual Mode support offload, but use different trigger mechanisms: CNV Burst Mode: the SPI Engine is triggered by the ADC's DATA_READY signal on the GP pin specified by the trigger-source consumer reference in the device tree (one cell = GP pin number 0-3). For this mode the driver acts as both an SPI offload consumer (DMA RX stream, message optimization) and a trigger source provider: it registers the GP/DATA_READY output via devm_spi_offload_trigger_register() so the offload framework can match the '#trigger-source-cells' phandle and automatically fire the SPI Engine DMA transfer at end-of-conversion. Manual Mode: the SPI Engine is triggered by a periodic trigger at the configured sampling frequency. The pre-built SPI message uses the pipelined CNV-on-CS protocol: N+1 16-bit transfers are issued for N active channels (the first result is discarded as garbage from the pipeline flush) and the remaining N results are captured by DMA. All offload transfers use 16-bit frames (bits_per_word=16, len=2). The SPI Engine assembles received bits into native 16-bit words before DMA, so offload samples land in CPU-native byte order (IIO_CPU). Dedicated channel arrays (AD4691_OFFLOAD_CHANNEL) reflect this: they omit IIO_BE and carry no soft timestamp (DMA delivers data directly to userspace). The software triggered-buffer path retains its IIO_BE channels because bits_per_word=8 causes SPI to deliver bytes MSB-first into memory, making the on-disk layout big-endian. Both paths use storagebits=16 as transfers are 16 bits wide in both cases. IIO_BUFFER_DMAENGINE is selected because the offload path uses devm_iio_dmaengine_buffer_setup_with_handle() to allocate and attach the DMA RX buffer to the IIO device. Signed-off-by: Radu Sabau <radu.sabau@analog.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2026-05-31iio: adc: ad4691: add triggered buffer supportRadu Sabau
Add buffered capture support using the IIO triggered buffer framework. CNV Burst Mode: the GP pin identified by interrupt-names in the device tree is configured as DATA_READY output. The IRQ handler stops conversions and fires the IIO trigger; the trigger handler executes a pre-built SPI message that reads all active channels from the AVG_IN accumulator registers and then resets accumulator state and restarts conversions for the next cycle. Manual Mode: CNV is tied to SPI CS so each transfer simultaneously reads the previous result and starts the next conversion (pipelined N+1 scheme). At preenable time a pre-built, optimised SPI message of N+1 transfers is constructed (N channel reads plus one NOOP to drain the pipeline). The trigger handler executes the message in a single spi_sync() call and collects the results. An external trigger (e.g. iio-trig-hrtimer) is required to drive the trigger at the desired sample rate. Both modes share the same trigger handler and push a complete scan — one big-endian 16-bit (__be16) slot per active channel, densely packed in scan_index order, followed by a timestamp. The CNV Burst Mode sampling frequency (PWM period) is exposed as a buffer-level attribute via IIO_DEVICE_ATTR. Signed-off-by: Radu Sabau <radu.sabau@analog.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2026-05-31iio: adc: ad4691: add initial driver for AD4691 familyRadu Sabau
Add support for the Analog Devices AD4691 family of high-speed, low-power multichannel SAR ADCs: AD4691 (16-ch, 500 kSPS), AD4692 (16-ch, 1 MSPS), AD4693 (8-ch, 500 kSPS) and AD4694 (8-ch, 1 MSPS). The driver implements a custom regmap layer over raw SPI to handle the device's mixed 1/2/3/4-byte register widths and uses the standard IIO read_raw/write_raw interface for single-channel reads. The chip idles in Autonomous Mode so that single-shot read_raw can use the internal oscillator without disturbing the hardware configuration. Three voltage supply domains are managed: avdd (required), vio, and a reference supply on either the REF pin (ref-supply, external buffer) or the REFIN pin (refin-supply, uses the on-chip reference buffer; REFBUF_EN is set accordingly). Hardware reset is performed by asserting then deasserting the reset-gpios GPIO line (tRESETL minimum pulse width is 10 ns, satisfied by function-call overhead); the driver then waits 300 µs for the chip to complete its internal reset sequence. A software reset via SPI_CONFIG_A is used as fallback when no reset GPIO is provided. Accumulator channel masking for single-shot reads uses ACC_MASK_REG via an ADDR_DESCENDING SPI write, which covers both mask bytes in a single 16-bit transfer. Reviewed-by: David Lechner <dlechner@baylibre.com> Signed-off-by: Radu Sabau <radu.sabau@analog.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2026-05-31iio: adc: ad4080: add support for AD4884Antoniu Miclaus
Add support for the AD4884, a dual-channel, 16-bit, 40 MSPS SAR ADC. The AD4884 is the dual-channel variant of the AD4084, sharing the same register map and SPI interface as the rest of the AD4080 family. Like the AD4880, it uses two independent ADC channels, each with its own SPI configuration interface. Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2026-05-31iio: Use named initializers for platform_device_id arraysUwe Kleine-König (The Capable Hub)
Named initializers are better readable and more robust to changes of the struct definition. This robustness is relevant for a planned change to struct platform_device_id replacing .driver_data by an anonymous union. Signed-off-by: Uwe Kleine-König (The Capable Hub) <u.kleine-koenig@baylibre.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2026-05-31iio: adc: spear_adc: align headers with IWYU principleRodrigo Gobbi
Remove unused includes and add what is being used: #include <linux/array_size.h> // for ARRAY_SIZE #include <linux/bits.h> // for GENMASKxx #include <linux/dev_printk.h> // for dev_err_probe, dev_info #include <linux/math.h> // for DIV_ROUND_UP #include <linux/mutex.h> // for struct mutex #include <linux/types.h> // for uXX definitions #include <linux/iio/types.h> // for IIO_CHAN_INFO_* Signed-off-by: Rodrigo Gobbi <rodrigo.gobbi.7@gmail.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2026-05-31iio: adc: spear_adc: sort includes alphabeticallyRodrigo Gobbi
Sort includes alphabetically, no functional change Signed-off-by: Rodrigo Gobbi <rodrigo.gobbi.7@gmail.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2026-05-31iio: adc: stm32-adc: simplify timestamp channel definitionDavid Lechner
Use IIO_CHAN_SOFT_TIMESTAMP() to define the timestamp channel instead of manually filling in the struct iio_chan_spec fields. This makes the code less verbose and mistake-prone. Signed-off-by: David Lechner <dlechner@baylibre.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2026-05-31iio: adc: cc10001_adc: simplify timestamp channel definitionDavid Lechner
Use IIO_CHAN_SOFT_TIMESTAMP() to define the timestamp channel instead of manually filling in the struct iio_chan_spec fields. This makes the code less verbose and mistake-prone. Signed-off-by: David Lechner <dlechner@baylibre.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2026-05-31iio: adc: at91_adc: simplify timestamp channel definitionDavid Lechner
Use IIO_CHAN_SOFT_TIMESTAMP() to define the timestamp channel instead of manually filling in the struct iio_chan_spec fields. This makes the code less verbose and mistake-prone. Signed-off-by: David Lechner <dlechner@baylibre.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2026-05-31iio: adc: dln2-adc: simplify timestamp channel definitionDavid Lechner
Use IIO_CHAN_SOFT_TIMESTAMP() to define the timestamp channel instead of manually filling in the struct iio_chan_spec fields. This makes the code less verbose and mistake-prone. Signed-off-by: David Lechner <dlechner@baylibre.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2026-05-31iio: Convert IIO_CHAN_SOFT_TIMESTAMP() to be compound literalAndy Shevchenko
Currently IIO_CHAN_SOFT_TIMESTAMP() can only be used to fill the static data. In some cases it would be convenient to use it as right value in the assignment operation. But it can't be done as is, because compiler has no clue about the data layout. Converting it to be a compound literal allows the above mentioned usage. While at it, tidy up the indentation. We also have to change existing uses of compound literal at the same time to avoid compiler errors. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: David Lechner <dlechner@baylibre.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2026-05-31iio: Initialize i2c_device_id arrays using member namesUwe Kleine-König (The Capable Hub)
While being less compact, using named initializers allows to more easily see which members of the structs are assigned which value without having to lookup the declaration of the struct. And it's also more robust against changes to the struct definition. The mentioned robustness is relevant for a planned change to struct i2c_device_id that replaces .driver_data by an anonymous union. This patch doesn't modify the compiled arrays, only their representation in source form benefits. The former was confirmed with x86 and arm64 builds. Signed-off-by: Uwe Kleine-König (The Capable Hub) <u.kleine-koenig@baylibre.com> Reviewed-by: Siratul Islam <email@sirat.me> Reviewed-by: Matti Vaittinen <mazziesaccount@gmail.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2026-05-31iio: adc: ad7091r5: Simplify driver_data handlingUwe Kleine-König (The Capable Hub)
The driver only supports a single device type. So the return value of i2c_get_match_data() is already known and can just be hardcoded without type casting. While at it also remove the unused .data of the single of_device_id entry. Signed-off-by: Uwe Kleine-König (The Capable Hub) <u.kleine-koenig@baylibre.com> Reviewed-by: Marcelo Schmitt <marcelo.schmitt@analog.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2026-05-31iio: adc: sun20i-gpadc: support non-contiguous channel lookupsMichal Piekos
Using consumer driver like iio-hwmon which resolve channels through io-channels phandles will fail for sparse channels because IIO core by default treats phandle argument as index into channel array. eg. <&gpadc 1> will fail if there is only channel@1 specified Add .fwnode_xlate() which maps DT phandle to the registered channel whose chan->channel matches the hardware channel number. It allows sparse channel maps to be consumed by drivers like iio-hwmon. Tested on Radxa Cubie A5E. Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com> Signed-off-by: Michal Piekos <michal.piekos@mmpsystems.pl> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2026-05-31iio: adc: sun20i-gpadc: add A523 gpadc supportMichal Piekos
A523 differs from existing sun20i-gpadc-iio by having two clocks; bus clock and module clock. Change driver to enable all clocks. Signed-off-by: Michal Piekos <michal.piekos@mmpsystems.pl> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2026-05-31iio: adc: xilinx-ams: refactor alarm mapping to table-driven approachGuilherme Ivo Bozi
Replace multiple open-coded switch statements that map between scan_index, alarm bits, and register offsets with a centralized table-driven approach. Introduce a struct-based alarm_map to describe the relationship between scan indices and alarm offsets, and add a helper to translate scan_index to event IDs. This removes duplicated logic across ams_get_alarm_offset(), ams_event_to_channel(), and ams_get_alarm_mask(). The new approach improves maintainability, reduces code size, and makes it easier to extend or modify alarm mappings in the future, while preserving existing behavior. Signed-off-by: Guilherme Ivo Bozi <guilherme.bozi@usp.br> Reviewed-by: Salih Erim <salih.erim@amd.com> Tested-by: Salih Erim <salih.erim@amd.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2026-05-31iio: adc: xilinx-ams: use guard(mutex) for automatic lockingGuilherme Ivo Bozi
Replace open-coded mutex_lock()/mutex_unlock() pairs with guard(mutex) to simplify locking and ensure proper unlock on all control flow paths. This removes explicit unlock handling, reduces boilerplate, and avoids potential mistakes in error paths while keeping the behavior unchanged. Signed-off-by: Guilherme Ivo Bozi <guilherme.bozi@usp.br> Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com> Reviewed-by: Salih Erim <salih.erim@amd.com> Tested-by: Salih Erim <salih.erim@amd.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2026-05-31iio: adc: xilinx-ams: fix out-of-bounds channel lookup in event handlingGuilherme Ivo Bozi
ams_event_to_channel() may return a pointer past the end of dev->channels when no matching scan_index is found. This can lead to invalid memory access in ams_handle_event(). Add a bounds check in ams_event_to_channel() and return NULL when no channel is found. Also guard the caller to safely handle this case. Fixes: d5c70627a794 ("iio: adc: Add Xilinx AMS driver") Signed-off-by: Guilherme Ivo Bozi <guilherme.bozi@usp.br> Reviewed-by: Salih Erim <salih.erim@amd.com> Tested-by: Salih Erim <salih.erim@amd.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2026-05-31iio: adc: ad7192: fix GPOCON register access annotationStepan Ionichev
The comment next to AD7192_REG_GPOCON marks the register as RO, but the AD7192 datasheet (Rev. A, page 24, GPOCON REGISTER) says: "The GPOCON register is an 8-bit register from which data can be read or to which data can be written." The driver itself uses ad_sd_write_reg() against this register in ad7192_show_scale() / write paths to control the bridge power-down switch and digital outputs, which matches the RW datasheet description. Update the comment to RW so it does not mislead future readers. Signed-off-by: Stepan Ionichev <sozdayvek@gmail.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2026-05-31iio: Drop unused driver_data in four i2c driversUwe Kleine-König (The Capable Hub)
For the four drivers the .driver_data member of i2c_device_id is write-only. Drop the explicit assignment. While touching these arrays use a named initializer to assign the .name member, which is easier to parse for a human. Signed-off-by: Uwe Kleine-König (The Capable Hub) <u.kleine-koenig@baylibre.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2026-05-31iio: adc: hx711: move scale computation to per-device storagePiyush Patle
The gain-to-scale table is global today, so probe-time scale updates for one device overwrite the values used by any earlier device instance. Fix this by making the gain table const and storing the computed scale values per device in hx711_data. No functional change for single-sensor configurations. Signed-off-by: Piyush Patle <piyushpatle228@gmail.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2026-05-31iio: adc: qcom-pm8xxx-xoadc: add support for reading channel labelsAntony Kurniawan Soemardi
Implement the .read_label callback to allow userspace to identify ADC channels via the "label" property in the device tree. The name field in pm8xxx_chan_info is renamed to label to better reflect its purpose. If no label is provided in the device tree, it defaults to the hardware datasheet name. The change has been tested on Sony Xperia SP (PM8921). Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Antony Kurniawan Soemardi <linux@smankusors.com> Reviewed-by: Linus Walleij <linusw@kernel.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2026-05-31iio: adc: qcom-pm8xxx-xoadc: remove redundant error logs when reading valuesAntony Kurniawan Soemardi
Drop dev_err() logging for -EINVAL and -ETIMEDOUT cases and rely on return values to report errors, reducing unnecessary log noise. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com> Signed-off-by: Antony Kurniawan Soemardi <linux@smankusors.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2026-05-31iio: adc: ad7192: replace usleep_range() with fsleep()Stepan Ionichev
The AD7192 datasheet (Rev. A, page 34, RESET section) says: "When a reset is initiated, the user must allow a period of 500 us before accessing any of the on-chip registers." Use fsleep(500) instead of usleep_range(500, 1000). Signed-off-by: Stepan Ionichev <sozdayvek@gmail.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2026-05-31iio: adc: ti-ads1298: Remove unnecessary CONFIG2 write during initMd Shofiqul Islam
The driver was enabling the internal test signal (INT_TEST), double amplitude (TEST_AMP), and fast frequency (TEST_FREQ_FAST) bits in CONFIG2 during initialization. These bits activate an internal square wave generator intended for device testing and calibration, not normal ECG operation. CONFIG2 defaults to having only the RESERVED bit set after reset, which is the correct value for normal operation. Remove the write entirely since it would just be writing the reset default value. Suggested-by: Mike Looijmans <mike.looijmans@topic.nl> Signed-off-by: Md Shofiqul Islam <shofiqtest@gmail.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2026-05-31iio: adc: ti-ads1298: Add parentheses around macro parameterMd Shofiqul Islam
ADS1298_REG_CHnSET() is missing parentheses around the parameter 'n'. Add them to follow kernel macro coding style and prevent potential operator precedence issues if the argument is an expression. Signed-off-by: Md Shofiqul Islam <shofiqtest@gmail.com> Reviewed-by: Stepan Ionichev <sozdayvek@gmail.com> Acked-by: Mike Looijmans <mike.looijmans@topic.nl> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2026-05-31iio: adc: ti-ads1298: Fix incorrect timeout commentMd Shofiqul Islam
At the lowest supported data rate of 250Hz, one conversion period is 4ms, not 40ms. The 50ms timeout is deliberately conservative to allow for kernel scheduling latency, which can be significant under load or on slow machines. Fix the comment to state the correct conversion time, use "lowest sample rate" for clarity, and explain that the extra margin exists to absorb scheduling latency so that no one is tempted to shrink the timeout to match the conversion period. Also drop the redundant ret variable assignment by using the return value of wait_for_completion_timeout() directly in the if() condition. Signed-off-by: Md Shofiqul Islam <shofiqtest@gmail.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2026-05-31iio: adc: ad7793: replace usleep_range() with fsleep()Stepan Ionichev
The AD7792/AD7793 datasheet (Rev. B, page 25, RESET section) says: "When a reset is initiated, the user must allow a period of 500 us before accessing any of the on-chip registers." Use fsleep(500) instead of usleep_range(500, 2000). The 500 us minimum stays the same; fsleep() picks the upper slack itself (about +25% on a default config -- narrower than the original 2000 us). Add a code comment with the datasheet reference so the "why" of the wait is visible at the call site. Signed-off-by: Stepan Ionichev <sozdayvek@gmail.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2026-05-31iio: adc: ingenic-adc: use guard()() and scoped_guard() to handle ↵Felipe Ribeiro de Souza
synchronisation Replace mutex_lock() and mutex_unlock() calls with guard()() in functions ingenic_adc_set_adcmd(), ingenic_adc_set_config(), ingenic_adc_enable(), ingenic_adc_capture(), and with scoped_guard() in function ingenic_adc_read_chan_info_raw(). This removes the need to call the unlock function, as the lock is automatically released when the function return or the scope exits for any other case. Signed-off-by: Felipe Ribeiro de Souza <felipers@ime.usp.br> Co-developed-by: Lucas Ivars Cadima Ciziks <lucas@ciziks.com> Signed-off-by: Lucas Ivars Cadima Ciziks <lucas@ciziks.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2026-05-31iio: adc: ingenic-adc: refactor ingenic_adc_read_chan_info_raw()Felipe Ribeiro de Souza
Extract the sample logic from ingenic_adc_read_chan_info_raw() into a new helper function __ingenic_adc_read_chan() to improve code readability and modularity. The helper handles the mutex-protected section for sampling channels, while the main function manages mutex and clock enabling/disabling. Signed-off-by: Felipe Ribeiro de Souza <felipers@ime.usp.br> Co-developed-by: Lucas Ivars Cadima Ciziks <lucas@ciziks.com> Signed-off-by: Lucas Ivars Cadima Ciziks <lucas@ciziks.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2026-05-31iio: adc: ingenic-adc: rename ingenic_adc_enable_unlocked() functionFelipe Ribeiro de Souza
Rename ingenic_adc_enable_unlocked() to __ingenic_adc_enable() to better reflect that this helper must be called with the lock held. Signed-off-by: Felipe Ribeiro de Souza <felipers@ime.usp.br> Co-developed-by: Lucas Ivars Cadima Ciziks <lucas@ciziks.com> Signed-off-by: Lucas Ivars Cadima Ciziks <lucas@ciziks.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2026-05-31iio: adc: mcp3422: write bit operations using bitfield.h APIsMarcelo Machado Lage
Replace manual bit manipulations with FIELD_GET(), FIELD_PREP() and FIELD_MODIFY() calls. The resulting code is more readable and maintainable, and 6 macros previously defined in the header are not needed anymore. Signed-off-by: Marcelo Machado Lage <marcelomlage@usp.br> Co-developed-by: Vinicius Lira <vinilira@usp.br> Signed-off-by: Vinicius Lira <vinilira@usp.br> Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2026-05-31iio: adc: mcp3422: rewrite mask macros with help of bits.h APIsMarcelo Machado Lage
Rewrite MCP3422_CHANNEL_MASK, MCP3422_SRATE_MASK, MCP3422_PGA_MASK and MCP3422_CONT_SAMPLING using GENMASK() and BIT() macros from bits.h. The other macros MCP3422_SRATE_{240, 60, 15, 3} were not changed because they are also used as array indices. Signed-off-by: Marcelo Machado Lage <marcelomlage@usp.br> Co-developed-by: Vinicius Lira <vinilira@usp.br> Signed-off-by: Vinicius Lira <vinilira@usp.br> Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2026-05-31iio: adc: ad7625: fix type mismatch in clamp() macroGiorgi Tchankvetadze
clamp() expects compatible operand types. The period calculation uses nanosecond constants, while the local target variable was narrower than the upper bound expression. Make target unsigned long and use unsigned long bounds, including NSEC_PER_USEC for the upper limit. This keeps the operands naturally aligned without adding casts. Suggested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Giorgi Tchankvetadze <giorgitchankvetadze1997@gmail.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2026-05-31iio: adc: ad4080: add support for AD4880 dual-channel ADCAntoniu Miclaus
Add support for the AD4880, a dual-channel 20-bit 40MSPS SAR ADC with integrated fully differential amplifiers (FDA). The AD4880 has two independent ADC channels, each with its own SPI configuration interface. The driver uses spi_new_ancillary_device() to create an additional SPI device for the second channel, allowing both channels to share the same SPI bus with different chip selects. Reviewed-by: David Lechner <dlechner@baylibre.com> Reviewed-by: Nuno Sá <nuno.sa@analog.com> Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2026-05-29iio: adc: ad_sigma_delta: fix clear_pending_event for registerless devicesRadu Sabau
ad_sigma_delta_clear_pending_event() falls through to the status register read path for devices with has_registers = false and no rdy_gpiod. For such devices, ad_sd_read_reg() skips the address byte entirely and clocks raw MISO bytes with no address phase — making it byte-for-byte identical to reading conversion data. If a pending conversion result is present, this partially consumes it and corrupts the data stream for the subsequent ad_sd_read_reg() call in ad_sigma_delta_single_conversion(). Furthermore, with num_resetclks = 0 on these devices, data_read_len evaluates to 0. If the clocked byte has bit 7 clear, pending_event is set and the code attempts memset(data + 2, 0xff, 0 - 1), overflowing to SIZE_MAX and corrupting the heap. Fix by returning 0 immediately when neither rdy_gpiod nor has_registers is set. This is safe for all current registerless devices: ad7191 and ad7780 (with powerdown GPIO) are reset between conversions by CS deassertion, so there is no stale result to drain; ad7780 (without powerdown GPIO) and max11205 are continuously-converting and cycle ~DRDY at the output data rate regardless of whether the previous result was read, so the next falling edge fires naturally. A future registerless device that holds ~DRDY asserted until data is read would be broken by this early return and would require either num_resetclks set or a rdy-gpio. The same heap corruption is reachable on any device with rdy_gpiod set but num_resetclks = 0: if the GPIO indicates a pending event, the drain path executes memset(data + 2, 0xff, 0 - 1) regardless of has_registers. Add an explicit data_read_len == 0 guard after the pending event check; the stale result is then consumed by the first ad_sd_read_reg() call in ad_sigma_delta_single_conversion(). Fixes: 132d44dc6966 ("iio: adc: ad_sigma_delta: Check for previous ready signals") Signed-off-by: Radu Sabau <radu.sabau@analog.com> Cc: <Stable@vger.kernel.org> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2026-05-29iio: adc: ad_sigma_delta: fix CS held asserted and state leaksRadu Sabau
In ad_sigma_delta_single_conversion(), set_mode(AD_SD_MODE_IDLE) and disable_one() were called from the out: block while keep_cs_asserted was still true. This caused any SPI transfer issued by those callbacks to carry cs_change=1, leaving CS permanently asserted after the conversion. Fix by moving both calls into the out_unlock: block, after keep_cs_asserted is cleared, matching the pattern already used in ad_sd_calibrate(). In the error path of ad_sd_buffer_postenable(), if an operation fails after set_mode(AD_SD_MODE_CONTINUOUS) has already succeeded (e.g. spi_offload_trigger_enable()), the device is left in continuous conversion mode with CS physically asserted. Additionally, bus_locked remaining true after spi_bus_unlock() causes subsequent SPI operations to call spi_sync_locked() without the bus lock actually held, allowing concurrent SPI access. Fix the error path by clearing keep_cs_asserted first, then calling set_mode(AD_SD_MODE_IDLE) to revert the device mode and deassert CS, then clearing bus_locked before releasing the bus. For devices that implement neither set_mode nor disable_one (such as MAX11205, which has no physical CS pin), no SPI transfer is issued during cleanup and the cs_change flag has no effect on any physical line. Fixes: 132d44dc6966 ("iio: adc: ad_sigma_delta: Check for previous ready signals") Signed-off-by: Radu Sabau <radu.sabau@analog.com> Cc: <Stable@vger.kernel.org> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2026-05-26iio: adc: qcom-spmi-iadc: balance enable_irq_wake() on driver unbindStepan Ionichev
iadc_probe() calls enable_irq_wake() after a successful devm_request_irq(), but the driver has no remove callback or matching disable_irq_wake(), so the wake reference count on the IRQ is leaked on module unload or driver unbind. Check the IRQ request error first, then register a devm action that calls disable_irq_wake() so the wake reference is released in the same scope as the enable. While here, drop the inverted "if (!ret) ... else return ret" in favour of the standard "if (ret) return ret;" pattern. Signed-off-by: Stepan Ionichev <sozdayvek@gmail.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2026-05-26iio: adc: ad7768-1: Select GPIOLIBJonathan Cameron
This driver provides a gpio chip a some related functions are not stubbed if GPIOLIB is not built. ad7768-1.c:420: undefined reference to `gpiochip_get_data' ad7768-1.c:498: undefined reference to `devm_gpiochip_add_data_with_key' Dual sign off reflects change of affiliation whilst this was under review. Fixes: d569ae0f052e ("iio: adc: ad7768-1: Add GPIO controller support") Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202512271235.WwAmAbOa-lkp@intel.com/ Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Cc: Stable@vger.kernel.org Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2026-05-20iio: intel_dc_ti_adc: switch to using FIELD_GET_SIGNED()Yury Norov
Switch from sign_extend32(FIELD_GET()) to the dedicated FIELD_GET_SIGNED() and don't provide the fields length explicitly. Acked-by: Jonathan Cameron <jic23@kernel.org> Signed-off-by: Yury Norov <ynorov@nvidia.com>
2026-05-15iio: adc: ti-ads1298: add bounds check to pga_settings indexSam Daly
ads1298_pga_settings has 7 elements but ADS1298_MASK_CH_PGA can yield values 0-7. If it yields a value >= 7, this causes an out-of-bounds array access. Add a bounds check and return -EINVAL if the index is out of range. Note that the remaining value b111 is reserved so should not be seen in a correctly functioning system. Assisted-by: gkh_clanker_2000 Cc: stable <stable@kernel.org> Cc: Jonathan Cameron <jic23@kernel.org> Cc: David Lechner <dlechner@baylibre.com> Cc: "Nuno Sá" <nuno.sa@analog.com> Cc: Andy Shevchenko <andy@kernel.org> Signed-off-by: Sam Daly <sam@samdaly.ie> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Jonathan Cameron <jic23@kernel.org>