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path: root/drivers/phy/Kconfig
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2026-06-11phy: add basic support for NXPs TJA1145 CAN transceiverDimitri Fedrau
Add basic driver support for NXPs TJA1145 CAN transceiver which brings the PHY up/down by switching to normal/standby mode using SPI commands. Tested-by: lee.lockhey@gmail.com Reviewed-by: Marc Kleine-Budde <mkl@pengutronix.de> Signed-off-by: Dimitri Fedrau <dimitri.fedrau@liebherr.com> Link: https://patch.msgid.link/20260602-tja1145-support-v6-2-0e0ffc8ee63d@liebherr.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2026-05-14phy: econet: Add PCIe PHY driver for EcoNet EN751221 and EN7528 SoCs.Caleb James DeLisle
Introduce support for EcoNet PCIe PHY controllers found in EN751221 and EN7528 SoCs, these SoCs are not identical but are similar, each having one Gen1 port, and one Gen1/Gen2 port. Co-developed-by: Ahmed Naseef <naseefkm@gmail.com> Signed-off-by: Ahmed Naseef <naseefkm@gmail.com> [cjd@cjdns.fr: add EN751221 support and refactor for clarity] Signed-off-by: Caleb James DeLisle <cjd@cjdns.fr> Link: https://patch.msgid.link/20260425173642.406089-3-cjd@cjdns.fr Signed-off-by: Vinod Koul <vkoul@kernel.org>
2026-05-10phy: Add driver for EyeQ5 Ethernet PHY wrapperThéo Lebrun
EyeQ5 embeds a system-controller called OLB. It features many unrelated registers, and some of those are registers used to configure the integration of the RGMII/SGMII Cadence PHY used by MACB/GEM instances. Wrap in a neat generic PHY provider, exposing two PHYs with standard phy_init() / phy_set_mode() / phy_power_on() operations. Reviewed-by: Luca Ceresoli <luca.ceresoli@bootlin.com> Signed-off-by: Théo Lebrun <theo.lebrun@bootlin.com> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Link: https://patch.msgid.link/20260309-macb-phy-v9-1-5afd87d9db43@bootlin.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2026-05-10phy: axiado: add Axiado eMMC PHY driverSriNavmani A
It provides the required configurations for Axiado eMMC PHY driver for HS200 mode. Signed-off-by: SriNavmani A <srinavmani@axiado.com> Co-developed-by: Prasad Bolisetty <pbolisetty@axiado.com> Signed-off-by: Prasad Bolisetty <pbolisetty@axiado.com> Signed-off-by: Tzu-Hao Wei <twei@axiado.com> Link: https://patch.msgid.link/20260504-axiado-ax3000-add-emmc-phy-driver-support-v3-2-3ab7eb45b0c5@axiado.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2026-04-17Merge tag 'phy-for-7.1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy Pull phy updates from Vinod Koul: "New Support: - Qualcomm Eliza QMP UFS PHY - Canaan K230 USB 2.0 PHY driver - Mediatek mt8167 dsi-phy - Eswin EIC7700 SATA PHY driver Updates: - Sorted subsytem Makefile/Kconfig and some kernel-doc udpates" * tag 'phy-for-7.1' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy: dt-bindings: phy: qcom,sc8280xp-qmp-ufs-phy: document the Eliza QMP UFS PHY phy: qcom: m31-eusb2: clear PLL_EN during init phy: eswin: Create eswin directory and add EIC7700 SATA PHY driver dt-bindings: phy: eswin: Document the EIC7700 SoC SATA PHY phy: apple: apple: Use local variable for ioremap return value phy: qcom: qmp-usbc: Simplify check for non-NULL pointer phy: marvell: mmp3-hsic: Avoid re-casting __iomem phy: apple: atc: Make atcphy_dwc3_reset_ops variable static dt-bindings: phy: mediatek,dsi-phy: Add support for mt8167 phy: usb: Add driver for Canaan K230 USB 2.0 PHY dt-bindings: phy: Add Canaan K230 USB PHY phy: phy-mtk-tphy: Update names and format of kernel-doc comments phy: Sort the subsystem Kconfig phy: Sort the subsystem Makefile phy: move spacemit pcie driver to its subfolder
2026-02-27phy: eswin: Create eswin directory and add EIC7700 SATA PHY driverYulin Lu
Create the eswin phy driver directory and add support for the SATA PHY driver on the EIC7700 SoC platform. Signed-off-by: Yulin Lu <luyulin@eswincomputing.com> Link: https://patch.msgid.link/20260205082219.1521-1-luyulin@eswincomputing.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2026-02-27phy: usb: Add driver for Canaan K230 USB 2.0 PHYJiayu Du
Add driver for the USB 2.0 PHY in Canaan K230 SoC, which supports PHY initialization and power management. Add Kconfig/Makefile under drivers/phy/canaan/. Signed-off-by: Jiayu Du <jiayu.riscv@isrc.iscas.ac.cn> Link: https://patch.msgid.link/20260121145526.14672-4-jiayu.riscv@isrc.iscas.ac.cn Signed-off-by: Vinod Koul <vkoul@kernel.org>
2026-02-27phy: make PHY_COMMON_PROPS Kconfig symbol conditionally user-selectableVladimir Oltean
Geert reports that enabling CONFIG_KUNIT_ALL_TESTS shouldn't enable features that aren't enabled without it. That isn't what "*all* tests" means, but as the prompt puts it, "All KUnit tests with satisfied dependencies". The impact is that enabling CONFIG_KUNIT_ALL_TESTS brings features which cannot be disabled as built-in into the kernel. Keep the pattern where consumer drivers have to "select PHY_COMMON_PROPS", but if KUNIT_ALL_TESTS is enabled, also make PHY_COMMON_PROPS user selectable, so it can be turned off. Modify PHY_COMMON_PROPS_TEST to depend on PHY_COMMON_PROPS rather than select it. Fixes: e7556b59ba65 ("phy: add phy_get_rx_polarity() and phy_get_tx_polarity()") Reported-by: Geert Uytterhoeven <geert@linux-m68k.org> Closes: https://lore.kernel.org/linux-phy/CAMuHMdUBaoYKNj52gn8DQeZFZ42Cvm6xT6fvo0-_twNv1k3Jhg@mail.gmail.com/ Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Link: https://patch.msgid.link/20260226153315.3530378-1-vladimir.oltean@nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2026-02-27phy: Sort the subsystem KconfigVinod Koul
Kconfig is supposed to be sorted alphabetically, sadly it has bitrotted so fix that Link: https://patch.msgid.link/20260223065819.395612-1-vkoul@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2026-02-27phy: move spacemit pcie driver to its subfolderVinod Koul
Commit fe4bc1a08638 ("phy: spacemit: support K1 USB2.0 PHY controller") created spacemit subfolder with usb driver while commit 57e920b92724 ("phy: spacemit: Introduce PCIe/combo PHY") added pcie driver in phy folder. Move latter into spacemit subfolder and rename file to phy-k1-pcie.c Reviewed-by: Alex Elder <elder@riscstar.com> Reviewed-by: Yixun Lan <dlan@kernel.org> Link: https://patch.msgid.link/20260223064240.386617-1-vkoul@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2026-02-04phy: GOOGLE_USB: add TYPEC dependencyArnd Bergmann
With CONFIG_TYPEC=m, this driver cannot be built-in: arm-linux-gnueabi/bin/arm-linux-gnueabi-ld: drivers/phy/phy-google-usb.o: in function `google_usb_phy_remove': phy-google-usb.c:(.text+0x24): undefined reference to `typec_switch_unregister' Add CONFIG_TYPEC as a hard dependency here to force a clean build. In theory, compile-testing with CONFIG_TYPEC=n would also work, but that seems pointless. Fixes: cbce66669c82 ("phy: Add Google Tensor SoC USB PHY driver") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://patch.msgid.link/20260202095655.1289973-1-arnd@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2026-01-14phy: Add Google Tensor SoC USB PHY driverRoy Luo
Support the USB PHY found on Google Tensor G5 (Laguna). This particular USB PHY supports both high-speed and super-speed operations, and is integrated with the SNPS DWC3 controller that's also on the SoC. This initial patch specifically adds functionality for high-speed. Co-developed-by: Joy Chakraborty <joychakr@google.com> Signed-off-by: Joy Chakraborty <joychakr@google.com> Co-developed-by: Naveen Kumar <mnkumar@google.com> Signed-off-by: Naveen Kumar <mnkumar@google.com> Signed-off-by: Roy Luo <royluo@google.com> Link: https://patch.msgid.link/20251227-phyb4-v10-2-e8caf6b93fe7@google.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2026-01-14Merge tag 'phy_common_properties' into nextVinod Koul
phy common properties Vladimir Oltean <vladimir.oltean@nxp.com> wrote: Introduce "rx-polarity" and "tx-polarity" device tree properties with Kunit tests
2026-01-14phy: add phy_get_rx_polarity() and phy_get_tx_polarity()Vladimir Oltean
Add helpers in the generic PHY folder which can be used using 'select PHY_COMMON_PROPS' from Kconfig, without otherwise needing to enable GENERIC_PHY. These helpers need to deal with the slight messiness of the fact that the polarity properties are arrays per protocol, and with the fact that there is no default value mandated by the standard properties, all default values depend on driver and protocol (PHY_POL_NORMAL may be a good default for SGMII, whereas PHY_POL_AUTO may be a good default for PCIe). Push the supported mask of polarities to these helpers, to simplify drivers such that they don't need to validate what's in the device tree (or other firmware description). Add a KUnit test suite to make sure that the API produces the expected results. The fact that we use fwnode structures means we can validate with software nodes, and as opposed to the device_property API, we can bypass the need to have a device structure. Co-developed-by: Bjørn Mork <bjorn@mork.no> Signed-off-by: Bjørn Mork <bjorn@mork.no> Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Link: https://patch.msgid.link/20260111093940.975359-6-vladimir.oltean@nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2026-01-01phy: spacemit: support K1 USB2.0 PHY controllerZe Huang
The SpacemiT K1 SoC includes three USB ports: - One USB2.0 OTG port - One USB2.0 host-only port - One USB3.0 port with an integrated USB2.0 DRD interface Each of these ports is connected to a USB2.0 PHY responsible for USB2 transmission. This commit adds support for the SpacemiT K1 USB2.0 PHY, which is compliant with the USB 2.0 specification and supports both 8-bit 60MHz and 16-bit 30MHz parallel interfaces. Signed-off-by: Ze Huang <huang.ze@linux.dev> Tested-by: Aurelien Jarno <aurelien@aurel32.net> Tested-by: Junzhong Pan <panjunzhong@linux.spacemit.com> Link: https://patch.msgid.link/20251017-k1-usb2phy-v6-2-7cf9ea2477a1@linux.dev Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-12-29phy: Kconfig: spacemit: add COMMON_CLK dependencyAlex Elder
The SpacemiT PCIe PHY driver depends on the common clock framework. Not specifying that led to a failure when doing a COMPILE_TEST build for the SPARC architecture. Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202512251903.sTVZgg6c-lkp@intel.com/ Signed-off-by: Alex Elder <elder@riscstar.com> Reviewed-by: Javier Martinez Canillas <javierm@redhat.com> Link: https://patch.msgid.link/20251226173228.2020411-1-elder@riscstar.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-12-23phy: apple: Add Apple Type-C PHYSven Peter
The Apple Type-C PHY (ATCPHY) is a PHY for USB 2.0, USB 3.x, USB4/Thunderbolt, and DisplayPort connectivity found in Apple Silicon SoCs. The PHY handles muxing between these different protocols and also provides the reset controller for the attached dwc3 USB controller. There is no documentation available for this PHY and the entire sequence of MMIO pokes has been figured out by tracing all MMIO access of Apple's driver under a thin hypervisor and correlating the register reads/writes to their kernel's debug output to find their names. Deviations from this sequence generally results in the port not working or, especially when the mode is switched to USB4 or Thunderbolt, to some watchdog resetting the entire SoC. This initial commit already introduces support for Display Port and USB4/Thunderbolt but the drivers for these are not ready. We cannot control the alternate mode negotiation and are stuck with whatever Apple's firmware decides such that any DisplayPort or USB4/Thunderbolt device will result in a correctly setup PHY but not be usable until the other drivers are upstreamed as well. Co-developed-by: Janne Grunau <j@jannau.net> Signed-off-by: Janne Grunau <j@jannau.net> Co-developed-by: Hector Martin <marcan@marcan.st> Signed-off-by: Hector Martin <marcan@marcan.st> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> # for reset controller Reviewed-by: Neal Gompa <neal@gompa.dev> Signed-off-by: Sven Peter <sven@kernel.org> Link: https://patch.msgid.link/20251214-b4-atcphy-v3-3-ba82b20e9459@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-12-23phy: spacemit: Introduce PCIe/combo PHYAlex Elder
Introduce a driver that supports three PHYs found on the SpacemiT K1 SoC. The first PHY is a combo PHY that can be configured for use for either USB 3 or PCIe. The other two PHYs support PCIe only. All three PHYs must be programmed with an 8 bit receiver termination value, which must be determined dynamically. Only the combo PHY is able to determine this value. The combo PHY performs a special calibration step at probe time to discover this, and that value is used to program each PHY that operates in PCIe mode. The combo PHY must therefore be probed before either of the PCIe-only PHYs will be used. Each PHY has an internal PLL driven from an external oscillator. This PLL started when the PHY is first initialized, and stays on thereafter. During normal operation, the USB or PCIe driver using the PHY must ensure (other) clocks and resets are set up properly. However PCIe mode clocks are enabled and resets are de-asserted temporarily by this driver to perform the calibration step on the combo PHY. Tested-by: Junzhong Pan <panjunzhong@linux.spacemit.com> Signed-off-by: Alex Elder <elder@riscstar.com> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/all/ba532f8d-a452-40e5-af46-b58b89f70a92@linaro.org/ [1] Tested-by: Yixun Lan <dlan@gentoo.org> Link: https://patch.msgid.link/20251218151235.454997-4-elder@riscstar.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-09-10phy: sophgo: Add USB 2.0 PHY driver for Sophgo CV18XX/SG200XInochi Amaoto
Add USB 2.0 PHY driver for Sophgo CV18XX/SG200X. Currently this driver does not support OTG mode as lack of document. Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Tested-by: Alexander Sverdlin <alexander.sverdlin@gmail.com> Link: https://lore.kernel.org/r/20250708063038.497473-3-inochiama@gmail.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-05-14phy: phy-snps-eusb2: add support for exynos2200Ivaylo Ivanov
The Exynos2200 SoC reuses the Synopsis eUSB2 PHY IP, alongside an external repeater, for USB 2.0. Add support for it to the existing driver, while keeping in mind that it requires enabled more than the reference clock. Signed-off-by: Ivaylo Ivanov <ivo.ivanov.ivanov1@gmail.com> Acked-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250504144527.1723980-10-ivo.ivanov.ivanov1@gmail.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-05-14phy: move phy-qcom-snps-eusb2 out of its vendor sub-directoryIvaylo Ivanov
As not only Qualcomm, but also Samsung is using the Synopsys eUSB2 IP (albeit with a different register layout) in their newer SoCs, move the driver out of its vendor sub-directory and rename it to phy-snps-eusb2. Suggested-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Ivaylo Ivanov <ivo.ivanov.ivanov1@gmail.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250504144527.1723980-4-ivo.ivanov.ivanov1@gmail.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-10-17phy: add NXP PTN3222 eUSB2 to USB2 redriverDmitry Baryshkov
The NXP PTN3222 is the single-port eUSB2 to USB2 redriver that performs translation between eUSB2 and USB2 signalling schemes. It supports all three data rates: Low Speed, Full Speed and High Speed. The reset state enables autonegotiation of the PHY role and of the data rate, so no additional programming is required. Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Tested-by: Konrad Dybcio <konradybcio@kernel.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Stephan Gerhold <stephan.gerhold@linaro.org> Tested-by: Stephan Gerhold <stephan.gerhold@linaro.org> Link: https://lore.kernel.org/r/20240830-nxp-ptn3222-v2-2-4c6d8535cf6c@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-08-29phy: nuvoton: add new driver for the Nuvoton MA35 SoC USB 2.0 PHYHui-Ping Chen
Nuvoton MA35 SoCs support DWC2 USB controller. Add the driver to drive the USB 2.0 PHY transceivers. Signed-off-by: Hui-Ping Chen <hpchen0nvt@gmail.com> Link: https://lore.kernel.org/r/20240805030356.14565-3-hpchen0nvt@gmail.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-06-20phy: airoha: Add PCIe PHY driver for EN7581 SoC.Lorenzo Bianconi
Introduce support for Airoha PCIe PHY controller available in EN7581 SoC. Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Tested-by: Zhengping Zhang <zhengping.zhang@airoha.com> Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> Link: https://lore.kernel.org/r/20ac99aa8628d97778594f606681db7f868f24fe.1718485860.git.lorenzo@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-01-27phy: realtek: usb: add new driver for the Realtek RTD SoC USB 2.0 PHYStanley Chang
Realtek DHC (digital home center) RTD SoCs support DWC3 XHCI USB controller. Added the driver to drive the USB 2.0 PHY transceivers. Note: New driver,remove the port status notification on legacy USB PHY. Use the generic PHY to notify the usb device connect and disconnect. To avoid using these PHYs would require describing the very same PHY using both the generic "phy" property and the deprecated "usb-phy" property. Signed-off-by: Stanley Chang <stanley_chang@realtek.com> Link: https://lore.kernel.org/r/20231213031203.4911-2-stanley_chang@realtek.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2023-11-06Revert "phy: realtek: usb: Add driver for the Realtek SoC USB 2.0 PHY"Johan Hovold
This reverts commit 134e6d25f6bd06071e5aac0a7eefcea6f7713955. The recently added Realtek PHY drivers depend on the new port status notification mechanism which was built on the deprecated USB PHY implementation and devicetree binding. Specifically, using these PHYs would require describing the very same PHY using both the generic "phy" property and the deprecated "usb-phy" property which is clearly wrong. We should not be building new functionality on top of the legacy USB PHY implementation even if it is currently stuck in some kind of transitional limbo. Revert the new Realtek PHY drivers for now so that the port status notification interface can be reverted and replaced. Fixes: 134e6d25f6bd ("phy: realtek: usb: Add driver for the Realtek SoC USB 2.0 PHY") Cc: stable@vger.kernel.org # 6.6 Cc: Stanley Chang <stanley_chang@realtek.com> Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Link: https://lore.kernel.org/r/20231106110654.31090-3-johan+linaro@kernel.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2023-10-23phy: Kconfig: Select GENERIC_PHY for GENERIC_PHY_MIPI_DPHYSakari Ailus
GENERIC_PHY can be selected by GENERIC_PHY_MIPI_DPHY directly as GENERIC_PHY has no dependencies. This way drivers that depend on GENERIC_PHY_MIPI_DPHY can avoid having to select both --- which they apparently often omit, too, which further leads to build failures. Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Reviewed-by: Randy Dunlap <rdunlap@infradead.org> Tested-by: Randy Dunlap <rdunlap@infradead.org> Link: https://lore.kernel.org/r/20231017080354.538047-1-sakari.ailus@linux.intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-09-03Merge tag 'phy-for-6.6' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy Pull phy updates from Vinod Koul: "As usual a couple of new drivers, a bunch of new device support and few updates to existing drivers New Support: - Starfive dphy rx, JH7110 usb and pcie support - Rockchip rv1126 inno-dsi phy, rk3588 usb and pcie support - Qualcomm sa8775p PCIe support, M31 USB PHY driver - Samsung Exynos850 usb support Updates: - Mediatek dsi driver clock updates - Qualcomm sm8150 combo phy with reworking of qmp pcie driver - Xilinx zynqmp runtime PM support" * tag 'phy-for-6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy: (83 commits) phy: exynos5-usbdrd: Add Exynos850 support phy: exynos5-usbdrd: Add 26MHz ref clk support phy: exynos5-usbdrd: Make it possible to pass custom phy ops dt-bindings: phy: samsung,usb3-drd-phy: Add Exynos850 support phy: qcom-qmp-combo: fix clock probing phy: qcom-qmp-pcie: support SM8150 PCIe QMP PHYs phy: qcom-qmp-pcie: populate offsets configuration phy: qcom-qmp-pcie: simplify clock handling phy: qcom-qmp-pcie: keep offset tables sorted phy: qcom-qmp-pcie: drop ln_shrd from v5_20 config dt-bindings: phy: qcom,qmp-pcie: describe SM8150 PCIe PHYs dt-bindings: phy: migrate QMP PCIe PHY bindings to qcom,sc8280xp-qmp-pcie-phy.yaml phy: fsl-imx8mq-usb: add dev_err_probe if getting vbus failed phy: qcom: Introduce M31 USB PHY driver dt-bindings: phy: qcom,m31: Document qcom,m31 USB phy phy: rockchip: inno-dsidphy: Add rv1126 support dt-bindings: phy: rockchip-inno-dsidphy: Document rv1126 dt-bindings: phy: mediatek,tphy: allow simple nodename pattern phy: amlogic: meson-g12a-usb2: fix Wvoid-pointer-to-enum-cast warning phy: marvell pxa-usb: fix Wvoid-pointer-to-enum-cast warning ...
2023-07-26phy: realtek: usb: Add driver for the Realtek SoC USB 2.0 PHYStanley Chang
Realtek DHC (digital home center) RTD SoCs support DWC3 XHCI USB controller. Added the driver to drive the USB 2.0 PHY transceivers. Signed-off-by: Stanley Chang <stanley_chang@realtek.com> Link: https://lore.kernel.org/r/20230725033318.8361-2-stanley_chang@realtek.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2023-07-12phy: starfive: Add JH7110 USB 2.0 PHY driverMinda Chen
Add Starfive JH7110 SoC USB 2.0 PHY driver support. USB 2.0 PHY default connect to Cadence USB controller. Signed-off-by: Minda Chen <minda.chen@starfivetech.com> Reviewed-by: Roger Quadros <rogerq@kernel.org> Link: https://lore.kernel.org/r/20230629075115.11934-4-minda.chen@starfivetech.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-06-28media: tc358746: select CONFIG_GENERIC_PHYArnd Bergmann
The tc358746 driver selects CONFIG_GENERIC_PHY_MIPI_DPHY and links to that, but this fails when CONFIG_GENERIC_PHY is disabled, because Kbuild then never enters the drivers/phy directory for building object files: ERROR: modpost: "phy_mipi_dphy_get_default_config_for_hsclk" [drivers/media/i2c/tc358746.ko] undefined! Add an explicit 'select GENERIC_PHY' here to ensure that the directory is entered, and add another dependency on that symbol so make it more obvious what is going on if another driver has the same problem, as this will produce a Kconfig warning. Link: https://lore.kernel.org/linux-media/20230623152318.2276816-1-arnd@kernel.org Fixes: 80a21da360516 ("media: tc358746: add Toshiba TC358746 Parallel to CSI-2 bridge driver") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Marco Felsch <m.felsch@pengutronix.de> Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
2023-03-20phy: xgene: Depend on ARCH_XGENE rather than plain arm64Mark Brown
The X-Gene PHY driver is unlikely to be useful on a kernel without general X-Gene support enabled but currently only depends on arm64 rather than the specific platform support. Narrow the dependency to ARCH_XGENE like we do for other X-Gene specific drivers to ensure that users who have configured down the set of platforms enabled don't see the option. Signed-off-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/r/20230221-phy-build-deps-v1-1-7091bcbd16b0@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-09-02phy: usb: Add USB2.0 phy driver for Sunplus SP7021Vincent Shih
Add USB2.0 phy driver for Sunplus SP7021 Signed-off-by: Vincent Shih <vincent.sunplus@gmail.com> Link: https://lore.kernel.org/r/1658717052-26142-2-git-send-email-vincent.sunplus@gmail.com [vkoul: remove trailing line in driver file] Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-11phy: phy-can-transceiver: Add support for setting muxAswath Govindraju
On some boards, for routing CAN signals from controller to transceiver, muxes might need to be set. Therefore, add support for setting the mux by reading the mux-states property from the device tree node. Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Link: https://lore.kernel.org/r/20220408111316.21189-1-a-govindraju@ti.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-08-12phy: pistachio-usb: Depend on MIPS || COMPILE_TESTJiaxun Yang
So it will be avilable for generic MIPS kernel. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Acked-By: Vinod Koul <vkoul@kernel.org> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-06-14phy: phy-can-transceiver: Add support for generic CAN transceiver driverAswath Govindraju
The driver adds support for generic CAN transceivers. Currently the modes supported by this driver are standby and normal modes for TI TCAN1042 and TCAN1043 CAN transceivers. The transceiver is modelled as a phy with pins controlled by gpios, to put the transceiver in various device functional modes. It also gets the phy attribute max_link_rate for the usage of CAN drivers. Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Acked-by: Marc Kleine-Budde <mkl@pengutronix.de> Link: https://lore.kernel.org/r/20210510051006.11393-4-a-govindraju@ti.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-03-17phy: Add Sparx5 ethernet serdes PHY driverSteen Hegelund
Add the Microchip Sparx5 ethernet serdes PHY driver for the 6G, 10G and 25G interfaces available in the Sparx5 SoC. Signed-off-by: Bjarni Jonasson <bjarni.jonasson@microchip.com> Signed-off-by: Steen Hegelund <steen.hegelund@microchip.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Link: https://lore.kernel.org/r/20210218161451.3489955-4-steen.hegelund@microchip.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-02-04phy: USB_LGM_PHY should depend on X86Geert Uytterhoeven
The Intel Lightning Mountain (LGM) USB3 USB is only present on Intel Lightning Mountain SoCs. Hence add a dependency on X86, to prevent asking the user about this driver when configuring a kernel without Intel Lightning Mountain platform support. Fixes: 1cce8f73a561c944 ("phy: Add USB3 PHY support for Intel LGM SoC") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20210129131753.2656306-1-geert+renesas@glider.be Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-12-05PHY: Ingenic: Add USB PHY driver using generic PHY framework.周琰杰 (Zhou Yanjie)
Used the generic PHY framework API to create the PHY, this driver supoorts USB OTG PHY used in JZ4770 SoC, JZ4775 SoC, JZ4780 SoC, X1000 SoC, X1830 SoC and X2000 SoC. Co-developed-by: 漆鹏振 (Qi Pengzhen) <aric.pzqi@ingenic.com> Signed-off-by: 漆鹏振 (Qi Pengzhen) <aric.pzqi@ingenic.com> Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> Tested-by: 周正 (Zhou Zheng) <sernia.zhou@foxmail.com> Tested-by: H. Nikolaus Schaller <hns@goldelico.com> Reviewed-by: Paul Cercueil <paul@crapouillou.net> Link: https://lore.kernel.org/r/20201116141906.11758-4-zhouyanjie@wanyeetech.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-09-22phy: fix USB_LGM_PHY warning & build errorsRandy Dunlap
Fix a Kconfig warning that is causing lots of build errors when USB_SUPPORT is not set. USB_PHY depends on USB_SUPPORT but "select" doesn't care about dependencies, so this driver should also depend on USB_SUPPORT. It should not select USB_SUPPORT. WARNING: unmet direct dependencies detected for USB_PHY Depends on [n]: USB_SUPPORT [=n] Selected by [m]: - USB_LGM_PHY [=m] Signed-off-by: Randy Dunlap <rdunlap@infradead.org> Cc: Li Yin <yin1.li@intel.com> Cc: Vadivel Murugan R <vadivel.muruganx.ramuthevar@linux.intel.com> Cc: Kishon Vijay Abraham I <kishon@ti.com> Cc: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/d1dd0ddd-3143-5777-1c63-195e1a32f237@infradead.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-09-11phy: Add USB3 PHY support for Intel LGM SoCRamuthevar Vadivel Murugan
Add support for USB PHY on Intel LGM SoC. Signed-off-by: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Link: https://lore.kernel.org/r/20200828022312.52724-3-vadivel.muruganx.ramuthevar@linux.intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-06-29phy: zynqmp: Add PHY driver for the Xilinx ZynqMP Gigabit TransceiverAnurag Kumar Vulisha
Xilinx ZynqMP SoCs have a Gigabit Transceiver with four lanes. All the high speed peripherals such as USB, SATA, PCIE, Display Port and Ethernet SGMII can rely on any of the four GT lanes for PHY layer. This patch adds driver for that ZynqMP GT core. Signed-off-by: Anurag Kumar Vulisha <anurag.kumar.vulisha@xilinx.com> Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Link: https://lore.kernel.org/r/20200629120054.29338-3-laurent.pinchart@ideasonboard.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-01-14phy: intel-lgm-emmc: Add support for eMMC PHYRamuthevar Vadivel Murugan
Add support for eMMC PHY on Intel's Lightning Mountain SoC. Signed-off-by: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2019-05-21treewide: Add SPDX license identifier - Makefile/KconfigThomas Gleixner
Add SPDX license identifiers to all Make/Kconfig files which: - Have no license information of any form These files fall under the project license, GPL v2 only. The resulting SPDX license identifier is: GPL-2.0-only Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2018-12-12phy: dphy: Add configuration helpersMaxime Ripard
The MIPI D-PHY spec defines default values and boundaries for most of the parameters it defines. Introduce helpers to help drivers get meaningful values based on their current parameters, and validate the boundaries of these parameters if needed. Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2018-12-12phy: add driver for Freescale i.MX8MQ USB3 PHYLi Jun
This is a cleaned up port of the downstream i.MX8MQ USB3 PHY driver. Signed-off-by: Li Jun <jun.li@nxp.com> Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2018-10-26Merge tag 'usb-4.20-rc1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb Pull USB/PHY updates from Greg KH: "Here is the big USB/PHY driver patches for 4.20-rc1 Lots of USB changes in here, primarily in these areas: - typec updates and new drivers - new PHY drivers - dwc2 driver updates and additions (this old core keeps getting added to new devices.) - usbtmc major update based on the industry group coming together and working to add new features and performance to the driver. - USB gadget additions for new features - USB gadget configfs updates - chipidea driver updates - other USB gadget updates - USB serial driver updates - renesas driver updates - xhci driver updates - other tiny USB driver updates All of these have been in linux-next for a while with no reported issues" * tag 'usb-4.20-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (229 commits) usb: phy: ab8500: silence some uninitialized variable warnings usb: xhci: tegra: Add genpd support usb: xhci: tegra: Power-off power-domains on removal usbip:vudc: BUG kmalloc-2048 (Not tainted): Poison overwritten usbip: tools: fix atoi() on non-null terminated string USB: misc: appledisplay: fix backlight update_status return code phy: phy-pxa-usb: add a new driver usb: host: add DT bindings for faraday fotg2 usb: host: ohci-at91: fix request of irq for optional gpio usb/early: remove set but not used variable 'remain_length' usb: typec: Fix copy/paste on typec_set_vconn_role() kerneldoc usb: typec: tcpm: Report back negotiated PPS voltage and current USB: core: remove set but not used variable 'udev' usb: core: fix memory leak on port_dev_path allocation USB: net2280: Remove ->disconnect() callback from net2280_pullup() usb: dwc2: disable power_down on rockchip devices usb: gadget: udc: renesas_usb3: add support for r8a77990 dt-bindings: usb: renesas_usb3: add bindings for r8a77990 usb: gadget: udc: renesas_usb3: Add r8a774a1 support USB: serial: cypress_m8: remove set but not used variable 'iflag' ...
2018-10-05phy: add driver for Microsemi Ocelot SerDes muxingQuentin Schulz
The Microsemi Ocelot can mux SerDes lanes (aka macros) to different switch ports or even make it act as a PCIe interface. This adds support for the muxing of the SerDes. Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-09-10phy: socionext: add USB3 PHY driver for UniPhier SoCKunihiko Hayashi
Add a driver for PHY interface built into USB3 controller implemented in UniPhier SoCs. This driver supports High-Speed PHY and Super-Speed PHY. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Signed-off-by: Motoya Tanigawa <tanigawa.motoya@socionext.com> Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2018-09-10phy: Add driver for Cadence MHDP DisplayPort SD0801 PHYScott Telford
Add driver for the Cadence SD0801 "Torrent" PHY used with the Cadence MHDP DisplayPort Tx controller. Integration with the MHDP driver will be the subject of another commit. Signed-off-by: Scott Telford <stelford@cadence.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
generated by cgit v1.2.3 (git 2.39.1) at 2026-07-10 02:06:00 +0000