Merge tag 'riscv-for-linus-7.2-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linuxHEADmaster

Pull RISC-V fixes from Paul Walmsley:

 - Call flush_cache_vmap() after populating new vmemmap pages, on all
   architectures. This avoids spurious faults on RISC-V
   microarchitectures that cache PTEs marked as non-present

 - Disable LTO for the vDSO to prevent the compiler from eliding
   functions that are used, but which don't appear to be

 - Fix an issue with libgcc's unwinder and signal handlers by dropping
   an unnecessary CFI landing pad instruction in __vdso_rt_sigreturn
   (similar to what was done on ARM64)

 - Avoid reading uninitialized memory under certain conditions in
   hwprobe_get_cpus()

 - Save some memory and I$ when CONFIG_DYNAMIC_FTRACE=n by avoiding our
   four-byte function alignment requirement in that case

 - Avoid clang warnings about null-pointer arithmetic in the I/O-port
   accessor macros (inb, outb, etc.) by ifdeffing them out when
   !CONFIG_HAS_IOPORT

 - Make the build of the lazy TLB flushing code in the vmalloc path
   depend on CONFIG_64BIT and CONFIG_MMU (since those platforms are the
   only ones that use it)

* tag 'riscv-for-linus-7.2-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux:
  riscv: hwprobe: Avoid uninitialized read in hwprobe_get_cpus()
  arch/riscv: vdso: remove CFI landing pad from rt_sigreturn
  riscv: vdso: Do not use LTO for the vDSO
  riscv: io: avoid null-pointer arithmetic in PIO helpers
  riscv: Gate FUNCTION_ALIGNMENT_4B on DYNAMIC_FTRACE
  mm/sparse-vmemmap: flush_cache_vmap() after hotplugging vmemmap
  riscv: mm: Make mark_new_valid_map() stuff depend on 64BIT && MMU

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