diff options
| author | Chao-ying Fu <icebergfu@gmail.com> | 2025-02-25 17:47:27 -0800 |
|---|---|---|
| committer | Anup Patel <anup@brainfault.org> | 2025-03-28 18:52:05 +0530 |
| commit | 995f226f3f335864d2fca6254af32fa7ab0162e6 (patch) | |
| tree | 9d5ce99d29cc14595f9ea5b7d21c46c0f5199730 /firmware | |
| parent | 8fe835303c4c7d134f07002c234ec5ec637953ca (diff) | |
| download | opensbi-995f226f3f335864d2fca6254af32fa7ab0162e6.tar.gz opensbi-995f226f3f335864d2fca6254af32fa7ab0162e6.zip | |
lib: Emit lr and sc instructions based on -march flags
When -march=rv64im_zalrsc_zicsr is used, provide atomic operations
and locks using lr and sc instructions only.
Signed-off-by: Chao-ying Fu <cfu@mips.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Link: https://lore.kernel.org/r/20250226014727.19710-1-cfu@mips.com
Signed-off-by: Anup Patel <anup@brainfault.org>
Diffstat (limited to 'firmware')
| -rw-r--r-- | firmware/fw_base.S | 10 | ||||
| -rw-r--r-- | firmware/payloads/test_head.S | 11 |
2 files changed, 21 insertions, 0 deletions
diff --git a/firmware/fw_base.S b/firmware/fw_base.S index 536bcd26..2498797c 100644 --- a/firmware/fw_base.S +++ b/firmware/fw_base.S @@ -59,8 +59,18 @@ _try_lottery: /* Jump to relocation wait loop if we don't get relocation lottery */ lla a6, _boot_lottery li a7, BOOT_LOTTERY_ACQUIRED +#ifdef __riscv_atomic amoswap.w a6, a7, (a6) bnez a6, _wait_for_boot_hart +#elif __riscv_zalrsc +_sc_fail: + lr.w t0, (a6) + sc.w t1, a7, (a6) + bnez t1, _sc_fail + bnez t0, _wait_for_boot_hart +#else +#error "need a or zalrsc" +#endif /* relocate the global table content */ li t0, FW_TEXT_START /* link start */ diff --git a/firmware/payloads/test_head.S b/firmware/payloads/test_head.S index 7a2ac126..7d25e07d 100644 --- a/firmware/payloads/test_head.S +++ b/firmware/payloads/test_head.S @@ -30,7 +30,18 @@ _start: /* Pick one hart to run the main boot sequence */ lla a3, _hart_lottery li a2, 1 +#ifdef __riscv_atomic amoadd.w a3, a2, (a3) +#elif __riscv_zalrsc +_sc_fail: + lr.w t0, (a3) + addw t1, t0, a2 + sc.w t1, t1, (a3) + bnez t1, _sc_fail + move a3, t0 +#else +#error "need a or zalrsc" +#endif bnez a3, _start_hang /* Save a0 and a1 */ |