diff options
| author | Joel Stanley <joel@jms.id.au> | 2026-06-30 12:19:43 +0930 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2026-07-01 19:59:10 +1000 |
| commit | 992d918d012018eb20a25a3b2e736d247f67509c (patch) | |
| tree | fec7232ad7ed054f085da373013c7ab4d6162c7c | |
| parent | 2a4d7ad49bc849e2c655ad2120033fc0f4129cd0 (diff) | |
| download | qemu-992d918d012018eb20a25a3b2e736d247f67509c.tar.gz qemu-992d918d012018eb20a25a3b2e736d247f67509c.zip | |
hw/riscv/aia: Configure stride for the M-mode IMSIC
riscv_create_aia() currently hard-codes the M-IMSIC at one 4 KiB page
per hart and gives callers no way to widen it.
Add an m_imsic_stride parameter that supplies the per hart byte
stride directly. The virt machine passes IMSIC_HART_SIZE(0)
(= 4 KiB), preserving its existing compact layout.
The parameter only changes how the slots are spaced, with the rest of
each slot reserved. This allows future platforms that have different
layouts to control the stride.
Reviewed-by: Philippe Mathieu-Daudé <philmd@mailo.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Message-ID: <20260630024952.1520546-6-joel@jms.id.au>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
| -rw-r--r-- | hw/riscv/aia.c | 3 | ||||
| -rw-r--r-- | hw/riscv/aia.h | 1 | ||||
| -rw-r--r-- | hw/riscv/virt.c | 1 |
3 files changed, 4 insertions, 1 deletions
diff --git a/hw/riscv/aia.c b/hw/riscv/aia.c index 82ea9d48ea..ed89160029 100644 --- a/hw/riscv/aia.c +++ b/hw/riscv/aia.c @@ -25,6 +25,7 @@ uint32_t imsic_num_bits(uint32_t count) } DeviceState *riscv_create_aia(bool msimode, int aia_guests, + uint32_t m_imsic_stride, uint16_t num_sources, const MemMapEntry *aplic_m, const MemMapEntry *aplic_s, @@ -47,7 +48,7 @@ DeviceState *riscv_create_aia(bool msimode, int aia_guests, /* Per-socket M-level IMSICs */ addr = imsic_m->base + socket * (1U << IMSIC_MMIO_GROUP_MIN_SHIFT); for (i = 0; i < hart_count; i++) { - riscv_imsic_create(addr + i * IMSIC_HART_SIZE(0), + riscv_imsic_create(addr + i * m_imsic_stride, base_hartid + i, true, 1, num_msis); } diff --git a/hw/riscv/aia.h b/hw/riscv/aia.h index 5ad0a902be..565f91accc 100644 --- a/hw/riscv/aia.h +++ b/hw/riscv/aia.h @@ -14,6 +14,7 @@ uint32_t imsic_num_bits(uint32_t count); DeviceState *riscv_create_aia(bool msimode, int aia_guests, + uint32_t m_imsic_stride, uint16_t num_sources, const MemMapEntry *aplic_m, const MemMapEntry *aplic_s, diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c index 8f80c0607b..b68067cfdd 100644 --- a/hw/riscv/virt.c +++ b/hw/riscv/virt.c @@ -1401,6 +1401,7 @@ static void virt_machine_init(MachineState *machine) } else { s->irqchip[i] = riscv_create_aia(s->aia_type == VIRT_AIA_TYPE_APLIC_IMSIC, s->aia_guests, + IMSIC_HART_SIZE(0), s->num_sources, &s->memmap[VIRT_APLIC_M], &s->memmap[VIRT_APLIC_S], |