diff options
| -rw-r--r-- | drivers/pinctrl/qcom/pinctrl-msm.c | 39 |
1 files changed, 39 insertions, 0 deletions
diff --git a/drivers/pinctrl/qcom/pinctrl-msm.c b/drivers/pinctrl/qcom/pinctrl-msm.c index 838969186185..3cb48ba31b78 100644 --- a/drivers/pinctrl/qcom/pinctrl-msm.c +++ b/drivers/pinctrl/qcom/pinctrl-msm.c @@ -1313,6 +1313,43 @@ static int msm_gpio_irq_set_affinity(struct irq_data *d, return -EINVAL; } +static int msm_gpio_irq_set_irqchip_state(struct irq_data *d, + enum irqchip_irq_state which, bool val) +{ + struct gpio_chip *gc = irq_data_get_irq_chip_data(d); + struct msm_pinctrl *pctrl = gpiochip_get_data(gc); + const struct msm_pingroup *g = &pctrl->soc->groups[d->hwirq]; + + if (which != IRQCHIP_STATE_PENDING) + return -EINVAL; + + if (test_bit(d->hwirq, pctrl->skip_wake_irqs)) + return -EINVAL; + + msm_writel_intr_status(val, pctrl, g); + + return 0; +} + +static int msm_gpio_irq_get_irqchip_state(struct irq_data *d, + enum irqchip_irq_state which, bool *val) +{ + struct gpio_chip *gc = irq_data_get_irq_chip_data(d); + struct msm_pinctrl *pctrl = gpiochip_get_data(gc); + const struct msm_pingroup *g = &pctrl->soc->groups[d->hwirq]; + + if (which != IRQCHIP_STATE_PENDING) + return -EINVAL; + + if (test_bit(d->hwirq, pctrl->skip_wake_irqs)) + return -EINVAL; + + g = &pctrl->soc->groups[d->hwirq]; + *val = msm_readl_intr_status(pctrl, g); + + return 0; +} + static int msm_gpio_irq_set_vcpu_affinity(struct irq_data *d, void *vcpu_info) { struct gpio_chip *gc = irq_data_get_irq_chip_data(d); @@ -1401,6 +1438,8 @@ static const struct irq_chip msm_gpio_irq_chip = { .irq_request_resources = msm_gpio_irq_reqres, .irq_release_resources = msm_gpio_irq_relres, .irq_set_affinity = msm_gpio_irq_set_affinity, + .irq_set_irqchip_state = msm_gpio_irq_set_irqchip_state, + .irq_get_irqchip_state = msm_gpio_irq_get_irqchip_state, .irq_set_vcpu_affinity = msm_gpio_irq_set_vcpu_affinity, .flags = (IRQCHIP_MASK_ON_SUSPEND | IRQCHIP_SET_TYPE_MASKED | |