summaryrefslogtreecommitdiff
AgeCommit message (Collapse)Author
2026-07-24arm64: dts: rockchip: refactor items from Orange Pi 5/b to prep for ProDennis Gilmore
The Orange Pi 5 Pro uses the same SoC and base as the Orange Pi 5 and Orange Pi 5B but has had sound, USB, and leds wired up differently. The 5 and 5B boards use gmac for ethernet where the Pro has a PCIe attached NIC. Move the 5/5B-specific bits (analog-sound/es8388, FUSB302 Type-C, gmac1, pwm-leds, i2s1_8ch routing, USB role-switch plumbing) out of rk3588s-orangepi-5.dtsi into a new rk3588s-orangepi-5-5b.dtsi that is included by both 5 and 5B. The RK806 PLDO1 and PLDO2 outputs are wired differently between the 5/5B and the Pro (PLDO1/PLDO2 are swapped), so label the PMIC node rk806 in the base dtsi, drop pldo-reg1/pldo-reg2 from it, and define them via a &rk806 regulators augmentation in rk3588s-orangepi-5-5b.dtsi. The Pro will supply its own mapping. Signed-off-by: Dennis Gilmore <dennis@ausil.us> Reviewed-by: Alexey Charkov <alchark@gmail.com> Link: https://patch.msgid.link/20260511025352.106126-4-dennis@ausil.us Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2026-07-24arm64: dts: rockchip: rename PLDO regulator labels to match schematic on ↵Dennis Gilmore
rk3588s-orangepi-5 The Orange Pi 5, 5B and 5 Pro schematics label the RK806 PLDO outputs using the pattern VCC_*_S0 / VCCA_*_S0 / VDDA_*_S0. Rename the base dtsi regulator labels (and the es8388 supply references) to match: pldo-reg1: avcc_1v8_s0 -> vcc_1v8_s0 pldo-reg2: vcc_1v8_s0 -> vcca_1v8_s0 pldo-reg3: avdd_1v2_s0 -> vdda_1v2_s0 pldo-reg4: vcc_3v3_s0 -> vcca_3v3_s0 Also update the saradc vref-supply reference to track the pldo-reg1 rename. No functional change. Signed-off-by: Dennis Gilmore <dennis@ausil.us> Link: https://patch.msgid.link/20260511025352.106126-3-dennis@ausil.us Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2026-07-24dt-bindings: arm: rockchip: Add Orange Pi 5 ProDennis Gilmore
Add compatible string for the Orange Pi 5 Pro. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Dennis Gilmore <dennis@ausil.us> Link: https://patch.msgid.link/20260511025352.106126-2-dennis@ausil.us Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2026-07-24arm64: dts: rockchip: Add devicetree for the Graperain G3568 v2Coia Prant
The Graperain G3568 v2 is an RK3568-based development board, just like the RK3568-EVB. It always uses soldered connections between the GR3568CV2 core board and the RK3568BV2/GR3568BV2 I/O board. The G3568 board has multiple hardware revisions, and we currently support v2 (I/O board). Specification: - SoC: RockChip RK3568 ARM64 (4 cores) - eMMC: 16-128 GB - RAM: 2-16 GB - Power: DC 12V 2A - Ethernet: 2x RTL8211F RGMII (10/100/1000 Mbps) - Wireless radio: 802.11b/g/n/ac dual-band - LED: Power: AlwaysOn User: GPIO - Button: ESC: SARADC/0 <1100k µV> MENU: SARADC/0 <1400k µV> VOL-: SARADC/0 <430k µV> VOL+: SARADC/0 <50k µV> Power/Reset: PMIC RK809 - CAN CAN/1: 4-pin (PH 2.0) - PWM PWM/4: Backlight PWM/5: Backlight PWM/7: IR Receiver - UART: UART/2: Debug TTL - 1500000 8N1 (1.25mm) UART/3: TTL (PH 2.0) UART/4: TTL (PH 2.0) UART/8: AP6356S Bluetooth UART/9: TTL (PH 2.0) - I2C: I2C/0: PMIC RK809 I2C/1: Touchscreen I2C/4: Camera I2C/5: RTC@51 PCF8563 - I2S: I2S/0: HDMI Sound I2S/1: RK809 Audio Codec I2S/3: AP6356S Bluetooth Sound - SDMMC: SDMMC/0: microSD (TF) slot SDMMC/2: AP6356S SDIO WiFi card - Camera: 1x CSI - Video: HDMI / DSI0 (MIPI/LVDS) / DSI1 (MIPI/EDP) - Audio: HDMI / MIC / Speaker / SPDIF / 3.5mm Headphones / AP6356S Bluetooth - USB: USB 2.0 HOST x2 USB 2.0 OTG x1 (shared with USB 3.0 OTG/HOST) USB 3.0 HOST x1 USB 3.0 OTG/HOST x1 - SATA: 1x SATA 3.0 with Power/4-pin - PCIe: 1x PCIe 3.0 x2 (x4 connector) Link: - https://image.chukouplus.com/upload/C_153/product_file/20211022/6daddec9e400458816dd4c57ba807fc3.pdf - https://blog.gov.cooking/archives/research-graperain-g3568-v2-and-flash.html Signed-off-by: Coia Prant <coiaprant@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> #gmac and mdio nodes Link: https://patch.msgid.link/20260702204628.2407308-5-coiaprant@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2026-07-24dt-bindings: arm: rockchip: Add Graperain G3568 seriesCoia Prant
Document the Graperain G3568 v2, which is a development board based on the Rockchip RK3568 SoC. Graperain G3568 series also have an SBC series with the suffix "box". Graperain G3568 v2 belongs to development board series, not SBC series. Link: https://www.graperain.cn/RK3568/RK3568-Development/ (China) Link: https://www.graperain.com/ARM-Embedded-RK3568-Development-Board/ (Global) Link: https://image.chukouplus.com/upload/C_153/product_file/20211022/6daddec9e400458816dd4c57ba807fc3.pdf Signed-off-by: Coia Prant <coiaprant@gmail.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://patch.msgid.link/20260702204628.2407308-4-coiaprant@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2026-07-24dt-bindings: vendor-prefixes: Add graperainCoia Prant
Add graperain to the vendor prefixes. Link: https://www.graperain.cn/ (China) Link: https://www.graperain.com/ (Global) Signed-off-by: Coia Prant <coiaprant@gmail.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://patch.msgid.link/20260702204628.2407308-3-coiaprant@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2026-07-24Revert "arm64: dts: rockchip: Further describe the WiFi for the Pinephone Pro"Oren Klopfer
This reverts commit 096bd8c679185f898cae9933c6a68650fa26ea4f. Just as with the Pinebook Pro, there are multiple chipset variants for the Pinephone Pro, and multiple firmware binaries for different distributions. The change causes issues with some of these combinations, and reverting it resolves the issues. See the Closes below for the full report. Similarly with the Pinebook Pro adjustment, the original commit only indicates "further description" and not indicative of fixing any existing issues, so reverting should not kick any back up. Fixes: 096bd8c67918 ("arm64: dts: rockchip: Further describe the WiFi for the Pinephone Pro") Cc: Heiko Stuebner <heiko@sntech.de> Cc: Peter Robinson <pbrobinson@gmail.com> Cc: Thorsten Leemhuis <regressions@leemhuis.info> Cc: stable@vger.kernel.org Closes: https://lore.kernel.org/r/20260607225901.64019-1-oklopfer37@gmail.com/ Signed-off-by: Oren Klopfer <oklopfer37@gmail.com> Link: https://patch.msgid.link/20260703201010.67311-1-oklopfer37@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2026-07-24arm64: dts: rockchip: fix HDMI-RX signal detect GPIO on yy3588Daniele Briguglio
The YY3588 declares the HDMI-RX signal detect on GPIO1_C6, but the receiver never sees an attached source there and cannot capture any input. That value was copied from the vendor device tree and is wrong. The core-board schematics are not available and the SoM documentation does not clearly show where this signal is routed, so the correct pin was read from the device tree in the board's Android image: GPIO1_D5. With GPIO1_D5 the receiver detects a connected source and locks, and v4l2 reports the input timing (1920x1080p60). Fixes: 19847bde695f ("arm64: dts: rockchip: Add Youyeetoo YY3588") Signed-off-by: Daniele Briguglio <hello@superkali.me> Link: https://patch.msgid.link/20260709-yy3588-hdmirx-d5-fix-v1-1-900a6790386c@superkali.me Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2026-07-24arm64: dts: rockchip: Enable USB device mode on rk3588s-roc-pcFabio Estevam
The USB3 OTG controller on the ROC-PC can be used in device mode, but the board description only enabled the DWC3 controller and USB2 PHY. The USBDP PHY remained disabled and the controller had no role-switch default, so DWC3 did not register a UDC and USB gadget drivers such as g_mass_storage failed to bind. Enable the USBDP PHY and describe the controller as a USB role switch with peripheral as the default role. This lets the controller register as a UDC when no external role provider has selected a host role. Tested on a Firefly Station M3 by binding g_mass_storage to expose the eMMC as a USB mass-storage gadget. Signed-off-by: Fabio Estevam <festevam@nabladev.com> Link: https://patch.msgid.link/20260709005006.413145-1-festevam@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2026-07-24arm64: dts: rockchip: Fix rk3588s-roc-pc audio descriptionFabio Estevam
The rk3588s-roc-pc ES8388 codec is connected to the i2s0_8ch audio interface. Use the matching I2S0 MCLK output for the codec clock instead of I2S1. Using the I2S1 MCLK can leave the ALSA PCM running while the codec has no usable master clock for the active audio path, resulting in silent headphone output. Also make the CPU DAI provide bitclock and frame clock. This matches the active Rockchip I2S controller side and avoids relying on the codec to drive the bus clocks. Route the headphone output to LOUT2 and ROUT2, matching the old 5.10 BSP device tree. LOUT1 and ROUT1 are used for the speaker route there, so using them for the headphone widget can leave the headphone jack silent even while the ALSA path is active. The old BSP also used hp-con-gpio on GPIO1_A4. Model that GPIO as a simple audio amplifier so DAPM enables the headphone connection when the headphone path is active. Cc: stable@vger.kernel.org Fixes: 7f9509791507 ("arm64: dts: rockchip: add DTs for Firefly ROC-RK3588S-PC") Signed-off-by: Fabio Estevam <festevam@nabladev.com> Link: https://patch.msgid.link/20260703025648.180135-1-festevam@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2026-07-24arm64: dts: rockchip: Fix incorrect interrupt for the 9Tripod X3568 v4Coia Prant
The recently changes for 9Tripod X3568 mistakenly configured the WiFi host-wake interrupt trigger type as IRQ_TYPE_LEVEL_LOW. However, the associated pin `wifi_host_wake_irq` is configured with an internal pull-down resistor. When the WiFi module enters a low-power sleep state and leaves the pin floating, this pull-down bias drives the pin low. Since the interrupt is incorrectly set to level-low, this combination traps the kernel in an endless interrupt loop. Correct the interrupt trigger type to IRQ_TYPE_LEVEL_HIGH based on the actual hardware logic: the pin is kept low by default and driven high by the WiFi module to wake up the host. Fixes: 993555b5476c ("arm64: dts: rockchip: Add AP6275S support for 9Tripod X3568 v4") Signed-off-by: Coia Prant <coiaprant@gmail.com> Link: https://patch.msgid.link/20260702202429.2341789-1-coiaprant@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2026-07-24arm64: dts: rockchip: fan speed control for FriendlyELEC CM3588 NASVsevolod Kozlov
The FriendlyELEC CM3588 NAS kit is often supplied with a case and a fan. Enable control of the speed of the fan using the trip points and cooling maps from rk3588-nanopc-t6.dtsi as a reference. Signed-off-by: Vsevolod Kozlov <zaba@mm.st> Link: https://patch.msgid.link/akkAvJap-MtbKp8B@Vsevolods-MacBook-Pro.local Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2026-07-24arm64: dts: rockchip: add HYM8563 RTC to Radxa CM5 IO boardBrian Mayer
Describe the Haoyu HYM8563 RTC connected to I2C6 on the Radxa CM5 IO carrier including its interrupt line. Assisted-by: Grok:grok-build Signed-off-by: Brian Mayer <bleemayer@gmail.com> Link: https://patch.msgid.link/20260705181920.8633-1-bleemayer@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2026-07-24arm64: dts: rockchip: Correct indentationKrzysztof Kozlowski
Correct spaces or mix of tabs+spaces into proper tab-indented lines. No functional impact (same DTB). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://patch.msgid.link/20260706093419.273625-2-krzysztof.kozlowski@oss.qualcomm.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2026-07-24arm64: dts: rockchip: Add HINLINK H28KChukun Pan
The HINLINK H28K (LinkStar H28K) is a SBC with the Rockchip RK3528 SoC. It has the following features: - 1x USB 2.0 - 8/32GB eMMC - 1/2/4GB LPDDR4 - MicroSD card slot - 1x 1GbE RTL8111H Ethernet - 1x 1GbE RTL8211F Ethernet Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn> Link: https://patch.msgid.link/20260610100006.366963-3-amadeus@jmu.edu.cn Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2026-07-24dt-bindings: arm: rockchip: Add HINLINK H28KChukun Pan
The HINLINK H28K (also known as LinkStar H28K) is a dual-gigabit SBC based on the RK3528 SoC. Add devicetree binding documentation for it. Link: https://wiki.seeedstudio.com/H28K_Datasheet/ Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://patch.msgid.link/20260610100006.366963-2-amadeus@jmu.edu.cn Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2026-07-24arm64: dts: rockchip: Add eDP node for RK3576Damon Ding
Add full device tree definition for the integrated eDP controller on RK3576, following the existing RK3588 hardware layout. Configure required register range, clocks, interrupt, phy, power domain, reset and grf properties to fully describe the controller. Signed-off-by: Damon Ding <damon.ding@rock-chips.com> Reviewed-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com> Link: https://patch.msgid.link/20260605022305.3058853-4-damon.ding@rock-chips.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2026-07-24arm64: dts: rockchip: Add missing hclk for RK3588 eDP1Damon Ding
Add the required HCLK_VO1 bus clock to RK3588 eDP1 node with corresponding clock-name "hclk". This clock is necessary for the eDP controller to access video output GRF and work properly. Previously the clock was enabled implicitly via GRF phandle reference. Add it explicitly now to align with updated binding. Fixes: a481bb0b1ad9 ("arm64: dts: rockchip: Add eDP1 dt node for rk3588") Signed-off-by: Damon Ding <damon.ding@rock-chips.com> Link: https://patch.msgid.link/20260605022305.3058853-3-damon.ding@rock-chips.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2026-07-24arm64: dts: rockchip: Add missing hclk for RK3588 eDP0Damon Ding
Add the required HCLK_VO1 bus clock to RK3588 eDP0 node with corresponding clock-name "hclk". This clock is necessary for the eDP controller to access video output GRF and work properly. Previously the clock was enabled implicitly via GRF phandle reference. Add it explicitly now to align with updated binding. Fixes: dc79d3d5e7c7 ("arm64: dts: rockchip: Add eDP0 node for RK3588") Signed-off-by: Damon Ding <damon.ding@rock-chips.com> Link: https://patch.msgid.link/20260605022305.3058853-2-damon.ding@rock-chips.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2026-07-24arm64: dts: rockchip: fix eMMC reset polarity on PX30 RingneckQuentin Schulz
According to the Jedec 5.1 specification, the device is held in reset when RST_n is low, therefore the polarity of the line must be that, as specified in the Device Tree binding (mmc/mmc-pwrseq-emmc.yaml). Due to the wrong polarity, eMMC devices with RST_n_FUNCTION[162] bitfield [1:0] set to 0x1 (the default is 0x0) will be held in reset forever. Cc: stable@vger.kernel.org Fixes: c484cf93f61b ("arm64: dts: rockchip: add PX30-µQ7 (Ringneck) SoM with Haikou baseboard") Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de> Link: https://patch.msgid.link/20260626-ringneck-emmc-polarity-v1-1-90cefe57b316@cherry.de Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2026-07-24arm64: dts: rockchip: fix regulator names on NanoPC-T6Ricardo Pardini
Three fixed-regulator names on the NanoPC-T6 don't match the board schematic [1]. - vcc3v3_pcie2x1l0 -> vdd_mpcie_3v3 This GPIO-switched 3v3 regulator is labeled vcc3v3_pcie2x1l0, but it is wired to and consumed by &pcie2x1l1. Per the schematic, the GPIO PCIE_M2_1_PWREN controls the power net VDD_MPCIE_3.3V; rename to match. - vdd_2v0_pldo_s3 -> vcc_2v0_pldo_s3 Typo in the regulator-name property of RK806-1 DCDC reg7. The node label and the schematic power-net name both already use the vcc_ form; only the regulator-name string had vdd_. - vcc3v3_pcie30 -> vcc3v3_pcie_m2_0 The GPIO-switched 3v3 feeding the M.2 M-Key (NVMe) slot is named after the PCIe controller it sits behind rather than the schematic power net. The schematic names it VCC3V3_PCIE_M2_0 (produced by an MP2143-based buck off VCC_5V0, enabled by PCIE_M2_0_PWREN); rename to match. No functional change. [1] https://wiki.friendlyelec.com/wiki/images/9/97/NanoPC-T6_2301_SCH.PDF Signed-off-by: Ricardo Pardini <ricardo@pardini.net> Link: https://patch.msgid.link/20260605-rk3588-dts-rockchip-nanopct6-fix-schematic-names-v1-1-15dd3b23ab1a@pardini.net Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2026-07-24arm64: dts: rockchip: Add Youyeetoo YY3588Daniele Briguglio
The YY3588 is a single board computer built around the Rockchip RK3588. Specification: - Rockchip RK3588 SoC - 4/8/16/32 GB LPDDR4/4x - up to 256 GB eMMC - microSD card slot - 1x 1000Base-T (Realtek RTL8211F) and 1x 2500Base-T (Realtek RTL8125) - HDMI 2.1 output - HDMI input - 4x USB 3.0 Type-A via onboard hub, 1x USB 2.0 Type-A - USB Type-C with USB 3.0 - M.2 M-key with PCIe 3.0 x4 - Mini PCIe slot for WiFi/BT or 4G modules - SATA 3.0 - ES8388 audio codec with headphone jack and onboard microphone - fan connector, RTC, recovery key - 12 V DC input Both Ethernet ports, eMMC, SD card, USB, Type-C, HDMI output, WiFi on the Mini PCIe slot, audio, the recovery key and the fan have been tested on the board. Link: https://wiki.youyeetoo.com/YY3588 Signed-off-by: Daniele Briguglio <hello@superkali.me> Link: https://patch.msgid.link/20260610-yy3588-board-v1-3-4bb7176b6826@superkali.me Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2026-07-24Merge tag 'arm64-fixes' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux Pull arm64 fixes from Will Deacon: "It's a bit all over the place, as I was hoping to fix a decade-old bug in our seccomp handling on syscall entry and ended up collecting other fixes in the meantime. You'll see the failed attempt (+revert) here but I didn't want to hold off on the others any longer. Hopefully we'll get that one squashed next week... - Fix early_ioremap() of unaligned ACPI tables - Remove bogus information from data abort diagnostics - Fix kprobes recursion during single-step - Fix incorrect constant in ESR address size fault macro - Fix OOB page-table walk in memory hot-unplug notifier - Fix OOB access to the linear map when retrieving an unaligned huge pte - Fix MPAM register reset values - Fix MPAM NULL dereference on teardown" * tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: arm64: make huge_ptep_get handled unaligned addresses arm64/mm: Check the requested PFN range during memory removal arm64: Correct value returned by ESR_ELx_FSC_ADDRSZ_nL() arm64: kprobes: Allow reentering kprobes while single-stepping arm64: kprobes: Only handle faults originating from XOL slot drivers/virt: pkvm: Fix end calculation in mmio_guard_ioremap_hook() Revert "arm64: syscall: Ensure saved x0 is kept in-sync with tracer updates" arm64: mm: When logging data aborts only decode Xs when ISV=1 arm64: fixmap: Allow 256K early_ioremap() at any offset arm_mpam: guard MBWU state before adding it to garbage arm_mpam: Fix MPAMCFG_MBW_PBM register setting arm_mpam: Fix software reset values of MPAMCFG_PRI arm64: syscall: Ensure saved x0 is kept in-sync with tracer updates
2026-07-24Merge tag 'iommu-fixes-v7.2-rc5' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/iommu/linux Pull iommu fixes from Will Deacon: "Joerg's away at the moment so I've been looking after the IOMMU tree in his absence. In the process of doing that, I've hoovered up a handful of fixes for the AMD and Intel drivers which address a combination of the usual out-of-bounds/locking/leak bugs as well as some logical issues around SVA and command completion. AMD: - Fix lockdep splat from nested domain allocation - Fix nested domain leak - Fix broken synchronisation of command completion - Fix OOB write in "ivrs_acpihid" command-line parsing VT-d: - Prevent SVA for IOMMUs with non-coherent page-table walker - Fix OOB write in PMU driver" * tag 'iommu-fixes-v7.2-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/iommu/linux: iommu/intel: Fix out-of-bounds memset in dmar_latency_disable() iommu/amd: Bound the early ACPI HID map iommu/vt-d: Disallow SVA if page walk is not coherent iommu/amd: Wait for completion instead of returning early in iommu_completion_wait() iommu/amd: Fix nested domain leak iommu/amd: Fix IRQ unsafe locking in gdom allocation
2026-07-24gpib: gpio: replace linux/gpio.h inclusionArnd Bergmann
linux/gpio.h is going away, so remove taht as the driver already includes linux/gpio/consumer.h. Acked-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> Reviewed-by: Linus Walleij <linusw@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2026-07-24Input: matrix_keyboard - replace linux/gpio.h inclusionArnd Bergmann
linux/gpio.h is going away, so remove that since the driver already includes linux/gpio/consumer.h. Acked-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> Reviewed-by: Linus Walleij <linusw@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2026-07-24phy: replace linux/gpio.h inclusionsArnd Bergmann
linux/gpio.h should no longer be used, so remove those and make sure linux/gpio/consumer.h is included instead. Acked-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> Reviewed-by: Linus Walleij <linusw@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2026-07-24pcmcia: replace linux/gpio.h inclusionsArnd Bergmann
The pcmcia drivers all use the legacy interfaces, so convert to include linux/gpio/legacy.h instead. Acked-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> Reviewed-by: Linus Walleij <linusw@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2026-07-24ASoC: replace linux/gpio.h inclusionsArnd Bergmann
linux/gpio.h is going away,s o use linux/gpio/consumer.h instead. Acked-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> Reviewed-by: Linus Walleij <linusw@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2026-07-24mfd: replace linux/gpio.h inclusionsArnd Bergmann
linux/gpio.h should no longer be used, convert these instead to either linux/gpio/consumer.h or linux/gpio/legacy.h as needed. Acked-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> Reviewed-by: Linus Walleij <linusw@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2026-07-24sh: replace linux/gpio.h inclusionsArnd Bergmann
linux/gpio.h should no longer be used, convert these instead to linux/gpio/legacy.h for the sh boards using the legacy interfaces, or remove it where it is not needed at all. Acked-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> Reviewed-by: Linus Walleij <linusw@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2026-07-24mips: replace linux/gpio.h inclusionsArnd Bergmann
linux/gpio.h should no longer be used, convert these instead to either linux/gpio/consumer.h or linux/gpio/legacy.h as needed. Acked-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> Reviewed-by: Linus Walleij <linusw@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2026-07-24x86/olpc: select GPIOLIB_LEGACYArnd Bergmann
The OLPC GPIO controller sets up a fixed number space that is used by at least two drivers: arch/x86/platform/olpc/olpc-xo1-sci.c: In function 'setup_ec_sci': arch/x86/platform/olpc/olpc-xo1-sci.c:358:13: error: implicit declaration of function 'gpio_request' [-Wimplicit-function-declaration] 358 | r = gpio_request(OLPC_GPIO_ECSCI, "OLPC-ECSCI"); | ^~~~~~~~~~~~ sound/pci/cs5535audio/cs5535audio_olpc.c: In function 'olpc_analog_input': sound/pci/cs5535audio/cs5535audio_olpc.c:41:9: error: implicit declaration of function 'gpio_set_value'; did you mean 'gpiod_set_value'? [-Wimplicit-function-declaration] 41 | gpio_set_value(OLPC_GPIO_MIC_AC, on); The AMD Geode platform that this is based on is now marked as 'Orphaned' in Kconfig, and it is likely that there are no XO1 users on modern kernels, but so far there is no consensus on removing it entirely. Select CONFIG_GPIOLIB_LEGACY for this platform and make sure the sound driver portion cannot be compiled without this. Acked-by: Borislav Petkov (AMD) <bp@alien8.de> Acked-by: Takashi Iwai <tiwai@suse.de> Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> Reviewed-by: Linus Walleij <linusw@kernel.org> Acked-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> # for input Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2026-07-24sh: select legacy gpiolib interfaceArnd Bergmann
Many board files on sh reference the legacy gpiolib interfaces that are becoming optional. To ensure the boards can keep building, select CONFIG_GPIOLIB_LEGACY on each of the boards that have one of the hardcoded calls. Cc: John Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de> Acked-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> Acked-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> # for input Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2026-07-24Input: gpio-keys: make legacy gpiolib optionalArnd Bergmann
Most users of gpio-keys and gpio-keys-polled use modern gpiolib interfaces, but there are still number of ancient sh, arm32 and x86 machines that have never been converted. Add an #ifdef block for the parts of the driver that are only used on those legacy machines. Link: https://lore.kernel.org/all/b3c94552-c104-42e3-be15-7e8362e8039e@gmail.com/ Link: https://lore.kernel.org/all/afJXG4_rtaj3l2Dk@google.com/ Link: https://lore.kernel.org/all/ajQ-CtU131FAJ9ES@google.com/ Acked-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> Acked-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> # for input Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2026-07-24Merge branch 'for-7.3/cxl-misc' into cxl-for-nextDave Jiang
cxl: Deny Features commands on the RAW mailbox path
2026-07-24Input: soc_button_array - select CONFIG_GPIOLIB_LEGACYArnd Bergmann
This driver converts information from ACPI in x86 based tablets and laptops into platform_data for the gpio_keys driver, using the obsolete gpio number based interfaces. This should really be converted to some other method, but since the conversion is nontrivial, have this one select GPIOLIB_LEGACY for the time being. This enables turning GPIOLIB_LEGACY off by default on most kernel builds. Since the driver is only used on x86 portables, add a CONFIG_X86 dependency, which means non-x86 allmodconfig builds usuallly build without the legacy gpio support. Link: https://lore.kernel.org/all/ah-1z9LhVG0wtfBw@google.com/ Acked-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> Acked-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> # for input Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2026-07-24tracing: Fix context switch counter truncationUsama Arif
trace_user_fault_read() samples nr_context_switches_cpu() before enabling preemption and retries the user copy if the counter changes. The helper returns unsigned long long because rq->nr_switches is u64, but the saved value is unsigned int. Once a CPU has performed 2^32 context switches, assigning the counter to cnt discards its upper bits. The comparison after the copy promotes cnt back to unsigned long long, but the lost bits remain zero, so it reports a change even when the task was never scheduled out. Every retry then fails the same way until the 100-try guard warns and the user copy is abandoned. This affects long-running systems and workloads with high context-switch rates. A CPU switching 1,000 times per second takes about 50 days. Store the sampled count in unsigned long long so the full value is preserved. Cc: stable@vger.kernel.org Fixes: 64cf7d058a00 ("tracing: Have trace_marker use per-cpu data to read user space") Link: https://patch.msgid.link/20260717173252.3431565-1-usama.arif@linux.dev Reported-by: Breno Leitao <leitao@debian.org> Signed-off-by: Usama Arif <usama.arif@linux.dev> Acked-by: Masami Hiramatsu (Google) <mhiramat@kernel.org> Reviewed-by: Breno Leitao <leitao@debian.org> Signed-off-by: Steven Rostedt <rostedt@goodmis.org>
2026-07-24selftests/ftrace: Reset triggers at top level before instance loopMasami Hiramatsu (Google)
When running instance tests, 'ftracetest' creates a new ftrace instance and runs the tests inside it. Before starting each test, it executes 'initialize_system()' to reset the ftrace state to initial-state. However, since 'initialize_system()' is executed in the context of the instance directory, it only cleans up triggers and filters of that instance. Any triggers or dynamic events left behind in the top-level instance by previous failed top-level tests, are left completely untouched. These top-level leftovers can cause subsequent instance-based tests to fail or even crash the kernel. Fix this by executing 'initialize_system()' in the top-level tracing directory once before entering the instance loop. Cc: stable@vger.kernel.org Link: https://patch.msgid.link/178425671889.84440.9477850701738666404.stgit@devnote2 Fixes: b5b77be812de ("selftests: ftrace: Allow some tests to be run in a tracing instance") Assisted-by: Antigravity:gemini-3.5-flash Signed-off-by: Masami Hiramatsu (Google) <mhiramat@kernel.org> Signed-off-by: Steven Rostedt <rostedt@goodmis.org>
2026-07-24tracing: Fix union collision of module and refcnt for dynamic eventsMasami Hiramatsu (Google)
In 'struct trace_event_call', the 'module' pointer and the 'refcnt' atomic variable share the same memory space in a union. For dynamic events, the union member is 'refcnt', which acts as an active reference counter. When a dynamic event (such as kprobe, uprobe, fprobe, eprobe, or wprobe) has a non-zero reference count (e.g. due to active event triggers or perf attachments), its 'call->module' evaluates to a small non-zero integer instead of NULL. When filtering or setting events for a specific module (e.g., writing ':mod:<module>' to 'set_event'), the code in '__ftrace_set_clr_event_nolock()' and 'update_event_fields()' reads 'call->module' directly without checking whether the event is dynamic. This causes the kernel to treat the small integer (refcnt) as a 'struct module' pointer, leading to a NULL/invalid pointer dereference (Oops) when dereferencing the module name. Fix this by ensuring that the 'TRACE_EVENT_FL_DYNAMIC' flag is checked before treating 'call->module' as a valid pointer in these code paths. Cc: stable@vger.kernel.org Link: https://patch.msgid.link/178425670947.84440.11344393611899824907.stgit@devnote2 Fixes: 4c86bc531e60 ("tracing: Add :mod: command to enabled module events") Assisted-by: Antigravity:gemini-3.5-flash Signed-off-by: Masami Hiramatsu (Google) <mhiramat@kernel.org> Signed-off-by: Steven Rostedt <rostedt@goodmis.org>
2026-07-24tracing: Fix mmiotrace possible NULL dereferencing of hiter->devSteven Rostedt
If the mmio_pipe_open() fails to find a PCI device, the hiter->dev will be assigned to NULL. The mmiotrace read() function dereferences the hiter->dev if hiter exists. Change the test of the read to not only check hiter being NULL, but also the hiter->dev before dereferencing it. Cc: stable@vger.kernel.org Link: https://patch.msgid.link/20260721211143.36dbd559@gandalf.local.home Fixes: f984b51e0779 ("ftrace: add mmiotrace plugin") Reported-by: Sashiko <sashiko-bot@kernel.org> Link: https://sashiko.dev/#/patchset/20260715143604.14481-1-gaikwad.dcg%40gmail.com Signed-off-by: Steven Rostedt <rostedt@goodmis.org>
2026-07-24Merge branch 'for-7.3/cxl-type2-test' into cxl-for-nextDave Jiang
cxl_test support for type2 cxl/test: Rework cxl_type2_mem_init() to use cxl_mock_platform_device_add() cxl/test: Add cxl_test accelerator driver cxl/test: Fixup hdm init for auto region to support type2 cxl/test: Propagate -ENOMEM on platform_device_alloc() failures cxl/test: Add hierarchy enumeration support for type2 device cxl/test: Refactor platform device enumerations cxl/test: Add type2 support for mock CFMWS0 cxl/test: Add test for module parameters
2026-07-24Merge branch 'soc/arm' into for-nextArnd Bergmann
* soc/arm: ARM: sa1100: h3xxx: convert gpio-keys to use software nodes ARM: sa1100: collie: convert gpio-keys to use software nodes ARM: sa1100: assabet: convert gpio-keys to use software nodes gpio: sa1100: register software node for GPIO controller
2026-07-24Merge branch 'for-7.3/cxl-type2-support' into cxl-for-nextDave Jiang
Remaining cxl/core type2 support cxl: Support dpa without a mailbox cxl: Support Type2 cxl regs mapping
2026-07-24ARM: sa1100: h3xxx: convert gpio-keys to use software nodesDmitry Torokhov
Convert the legacy gpio-keys platform device on the StrongARM SA-1100 HP iPAQ H3xxx series boards to use software nodes and device properties. This helps progress the removal of platform data support from the gpio-keys driver. Define static software nodes for the gpio-keys device and the power and action button child nodes at file scope, referencing the SA-1100 GPIO controller node directly. In h3xxx_mach_init(), register the software node group and use platform_device_register_full() to register the device. Assisted-by: Antigravity:gemini-3.5-flash Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Link: https://lore.kernel.org/r/20260706-sa1100-swnode-v1-4-332759bbd930@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2026-07-24ARM: sa1100: collie: convert gpio-keys to use software nodesDmitry Torokhov
Convert the legacy gpio-keys platform device on the StrongARM SA-1100 Collie (Sharp Zaurus SL-5500) board to use software nodes and device properties. This helps progress the removal of platform data support from the gpio-keys driver. Define static software nodes for the gpio-keys device and the power and sync button child nodes at file scope, referencing the SA-1100 GPIO controller node directly and specifying EV_PWR input type. In collie_init(), register the software node group and use platform_device_register_full() to register the gpio-keys device. Assisted-by: Antigravity:gemini-3.5-flash Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Link: https://lore.kernel.org/r/20260706-sa1100-swnode-v1-3-332759bbd930@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2026-07-24ARM: sa1100: assabet: convert gpio-keys to use software nodesDmitry Torokhov
Convert the legacy gpio-keys platform device on the StrongARM SA-1100 Assabet evaluation board to use software nodes and device properties. This allows describing the buttons and their GPIO bindings via software nodes so that platform data support can eventually be removed from the gpio-keys driver. Define static software nodes for the gpio-keys device and the two button child nodes at file scope, referencing the SA-1100 GPIO controller node directly. In assabet_init(), register the software node group and use platform_device_register_full() to register the gpio-keys device. Assisted-by: Antigravity:gemini-3.5-flash Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Link: https://lore.kernel.org/r/20260706-sa1100-swnode-v1-2-332759bbd930@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2026-07-24gpio: sa1100: register software node for GPIO controllerDmitry Torokhov
Define and register a static software node (sa1100_gpiochip_node) for the SA-1100 GPIO controller during sa1100_init_gpio(). Assign its firmware node directly to the GPIO chip prior to calling gpiochip_add_data(). This allows StrongARM SA-1100 board setup files to reference the SoC GPIO controller in property entries when converting legacy platform data to software nodes, resolving pin bindings directly via the attached firmware node without relying on name matching. Assisted-by: Antigravity:gemini-3.5-flash Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Link: https://lore.kernel.org/r/20260706-sa1100-swnode-v1-1-332759bbd930@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2026-07-24cxl: Deny Features commands on the RAW mailbox pathDave Jiang
The RAW mailbox command path allows user to issue arbitrary opcodes to the device. The FWCTL interface was introduced to support the CXL Features commands where access control is provided depends on what the CEL indicates. Add the Features commands to cxl_disabled_raw_commands[] to ensure that all Features commands are only accessible through the FWCTL interface. The cxl_raw_allow_all debugfs override knob bypasses the disabled list if the user is aware of the risks and wants to use the RAW path for Features commands. Reviewed-by: Alison Schofield <alison.schofield@intel.com> Link: https://patch.msgid.link/20260715155126.1629178-1-dave.jiang@intel.com Signed-off-by: Dave Jiang <dave.jiang@intel.com>
2026-07-24Merge branch 'ti-drivers-soc-next' into ti-nextNishanth Menon
Next batch of driver fixes Signed-off-by: Nishanth Menon <nm@ti.com>