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* changes:
feat(lfa): harden cancel handling and lock around LFA_CANCEL
feat(lfa): serialize activate across CPUs and manage rendezvous policy
feat(docs): add documentation page for BL31 LFA
feat(fvp): add FVP platform support for BL31 live activation
feat(lfa): update LFA service to support BL31 live activation
feat(lfa): lfa service updates
feat(lfa): add relocatable code for BL31 live activation
feat(lfa): xlat changes for BL31 LFA
feat(lfa): bl31 linker file updates for lfa
feat(lfa): add build flag for BL31 LFA support
feat: place errata into their own section
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This patch adds the platform components of BL31 live
activation.
Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: I5c08eecdc0420f05462740b72a59ee2e837cf701
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This patch adds the bulk of the BL31 live activation service
framework including the warm reset handler.
Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: Id9cbeeddbc023ee2540b88008e6c2502d816ee24
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This patch updates the LFA service components in preparation for
BL31 specific changes.
Change-Id: I6d4dd90b11fa1d8729c4f9026d2ddce0272aea76
Signed-off-by: John Powell <john.powell@arm.com>
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integration
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This patch adds the relocatable code functions that are copied
out of the main BL31 image during a live activation and updates
the holding pen code to have a relocatable variant.
Change-Id: I30ba6e118a6b888e0adf4dbd605d15ac0b40bea8
Signed-off-by: John Powell <john.powell@arm.com>
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This patch adds xlat library changes needed to support live
activation of BL31 images.
Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: I3956542b7978133dddcb0d1ace5512b6cfbfedc0
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This patch moves CPU reset functions and reset errata workarounds
into their own linker subsections .text.errata and .rodata.errata,
as well as modifies CPU macros to allow this.
When BL31 LFA is integrated later, this allows these subsections
to be grouped together and padded, allowing them to be updated
during live activation without affectinn the rest of the BL31
image.
Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: Id6f248fa796a998152e4e0b946fa3717cb0cfbf6
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* changes:
refactor(el3-runtime)!: remove PLAT_PCPU_DATA_SIZE
fix(el3-runtime): improve PLAT_PCPU_DATA_SIZE check
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integration
* changes:
fix(st): cast clk_get_rate return when setting console
fix(st): cast the read_cntfrq_el0() return to unsigned int
fix(st-clock): correct some STM32MP15 clock driver function
fix(st-pmic): store regulator ID as an uint8_t
fix(st-regulator): remove const for driver_data
fix(st-pmic): stub some functions for STPMIC1L
fix(st-sdmmc2): update plat_sdmmc2_use_dma prototype
fix(st-drivers): use BIT_32/GENMASK_32 in ST drivers
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The driver_data will be used to store regul_handle_s data, but bypass_mv
is not const and will be updated at driver init. The driver_data should
then not be const.
The issue was seen when trying to correct issues seen with the GCC flag:
-Wdiscarded-qualifiers.
Change-Id: I19f42c6812bf6ed604ceca0a196e3103bec58dd2
Signed-off-by: Yann Gautier <yann.gautier@st.com>
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If STM32MP_STPMIC1L is enabled, we use the STPMIC2 driver, with STPMIC1
include file. And the functions print_pmic_info_and_debug() and
pmic_voltages_init() do nothing in that case. Instead of defining them
in STPMIC2 driver, stub them in STPMIC1 include file under the flag
STM32MP_STPMIC1L.
Change-Id: I503327daa5098c99c48bbd78fb2253cebfbf390b
Signed-off-by: Yann Gautier <yann.gautier@st.com>
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Introduce COMMON_MECID_WIDTH in the FIRME MECID feature registers. The
value is initialized as the minimum of the architectural MECID width and
the maximum MECID width supported by platform peripherals. Note, this
feature register was accidentally omitted from ALP2 version of the
specification. It will be added in the next version of the
specification.
Change-Id: I6766c319b81dabacef76f771546ef7979e98c07d
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
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Rename FIRME function ID macros that were missing the _FID suffix and
update their call sites and documentation references for consistency.
Change-Id: Id34a2e5a71a027f2d9d3724fc7fe44852540875e
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
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Use FIRME_MEC_REFRESH as the provider for the RMM_MEC_REFRESH command
and remove replace the existing plat_rmmd_mecid_key_update() hook.
BREAKING-CHANGE: plat_rmmd_mecid_key_update() is deprecated for MEC
refresh flows and has been dropped. Platforms that currently implement
plat_rmmd_mecid_key_update() for MECID key refresh must migrate that
logic to plat_firme_mec_refresh(), including converting return values to
FIRME status codes.
Change-Id: I79985e0f7280b31e1fd149ef1e51bc9cf4b5a6cb
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
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Add the FIRME MECID management ABI and service implementation, advertise
the service through the base feature register when available, and
provide platform hooks for MEC refresh.
Change-Id: I1a1a2f2dd615274956d0db85049b0d6760fbcbc4
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
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The function plat_sdmmc2_use_dma() is called with 2 parameters that are
uintptr_t. Adapt the function prototype to use uintptr_t instead of
unsigned int. It was not an issue on aarch32 platforms, but causes
warning on aarch64 platforms:
drivers/st/mmc/stm32_sdmmc2.c:549:52: warning: implicit conversion loses
integer precision: 'uintptr_t' (aka 'unsigned long') to 'unsigned int'
[-Wshorten-64-to-32]
549 | sdmmc2_params.use_dma = plat_sdmmc2_use_dma(base, buf);
| ~~~~~~~~~~~~~~~~~~~ ^~~
drivers/st/mmc/stm32_sdmmc2.c:549:46: warning: implicit conversion loses
integer precision: 'uintptr_t' (aka 'unsigned long') to 'unsigned int'
[-Wshorten-64-to-32]
549 | sdmmc2_params.use_dma = plat_sdmmc2_use_dma(base, buf);
| ~~~~~~~~~~~~~~~~~~~ ^~~~
Change-Id: I1f8b0cc9c75c7d5b4867847360502e92588f8259
Signed-off-by: Yann Gautier <yann.gautier@st.com>
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* changes:
fix(common): use #ifdef PLAT_RO_XLAT_TABLES
fix(xlat): use #ifdef PLAT_RO_XLAT_TABLES
fix(bl): use #ifdef PLAT_RO_XLAT_TABLES
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There are no users of this macro, remove it.
BREAKING-CHANGE: The macro PLAT_PCPU_DATA_SIZE, the downstream users
should move to PER_CPU framework.
Change-Id: I6b98eead80d4cb40874b327ffefa4425a2082311
Signed-off-by: Yann Gautier <yann.gautier@st.com>
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* changes:
fix(stm32mp2): force STM32MP_STPMIC1L disabling
fix(stm32mp1): disable STM32MP_DDR_FIP_IO_STORAGE
fix(st): make STM32MP1X/STM32MP2X boolean flags
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Instead of defining those 2 flags with TF_CFLAGS += -D<flag>, use the
call assert_booleans/add_defines helpers. The #ifdef in C files are
changed to #if.
And to avoid flags being unset, always define all the SoC flags whatever
the platform is. This avoid warnings when -Wundef flag is set.
Change-Id: Ic0baf441ff725c7f1ff7831678ad83947a12e568
Signed-off-by: Yann Gautier <yann.gautier@st.com>
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For BL2, or when compiling libc, REPORT_ERRATA will not be defined.
To avoid warnings when enabling -Wundef flag, force REPORT_ERRATA to 0
for BL2.
For libc, when compiling setjmp.S, the issue is that it cannot be
defined the same way. As REPORT_ERRATA will only be enabled for BL1,
BL31 or BL32, rework the cpu_ops.h file to always check one of those
images is used before checking REPORT_ERRATA.
Change-Id: Ie4b708cfbb7f8eee9db3254069f179b148c5db6d
Signed-off-by: Yann Gautier <yann.gautier@st.com>
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integration
* changes:
fix(el3-runtime): use #ifdef for IMAGE_BL flags
fix(errata-abi): use #ifdef for IMAGE_BL flags
fix(cpufeat): use #ifdef for IMAGE_BL flags
fix(auth): use #ifdef for IMAGE_BL flags
fix(docs): use #ifdef for IMAGE_BL flags
fix(cpus): use #ifdef for IMAGE_BL flags
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* changes:
fix(cpufeat): invalidate the FEAT_BRBE buffer after reset
feat(cpufeat): add support for FEAT_BRBEv1p1
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The inclusion of gicv3.h file was done in context_mgmt.c file for the
ICC_SRE register bit definitions. Those definition can be moved to
aarch64 arch.h file, and including gicv3.h is then no more required.
This also avoid warning when building with -Wundef flag, for platforms
not using GICv3:
include/drivers/arm/gicv3.h: In function 'gicv3_redist_size':
include/drivers/arm/gicv3.h:366:5: warning: 'GIC_ENABLE_V4_EXTN' is not
defined, evaluates to '0' [-Wundef]
366 | #if GIC_ENABLE_V4_EXTN
| ^~~~~~~~~~~~~~~~~~
include/drivers/arm/gicv3.h: At top level:
include/drivers/arm/gicv3.h:598:5: warning: 'GIC600_ERRATA_WA_2384374'
is not defined, evaluates to '0' [-Wundef]
598 | #if GIC600_ERRATA_WA_2384374
| ^~~~~~~~~~~~~~~~~~~~~~~~
Change-Id: I69a106a583e4e2846eed883799ef876f7218bcd2
Signed-off-by: Yann Gautier <yann.gautier@st.com>
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integration
* changes:
fix(tc): use #ifdef for IMAGE_BL flags
fix(neoverse-rd): use #ifdef for IMAGE_BL flags
fix(n1sdp): use #ifdef for IMAGE_BL flags
fix(morello): use #ifdef for IMAGE_BL flags
fix(fvp): use #ifdef for IMAGE_BL flags
fix(automotive_rd): use #ifdef for IMAGE_BL flags
fix(common): use #ifdef for IMAGE_BL flags
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PLAT_PARTITION_MAX_ENTRIES & PLAT_PARTITION_BLOCK_SIZE may not be
defined by platform code in order to use the default values.
Those flag will then not be defined, and this can trigger a warning
when enabling -Wundef flag.
Change-Id: I4c872a40b035aaf874553629d45ea509c88c8f26
Signed-off-by: Yann Gautier <yann.gautier@st.com>
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First check __clang_major__ is defined, before checking its value. This
is done the same way in lib/compiler-rt/builtins/int_types.h.
This corrects a compiler warning with -Wundef.
Change-Id: Ibd8b1014542e787eece799934b9c8bf8f93bb21a
Signed-off-by: Yann Gautier <yann.gautier@st.com>
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PLAT_PCPU_DATA_SIZE can optionally be defined in platform_def.h file.
To avoid a warning when enabling -Wundef flag, check its definition
and its value is above 0.
Change-Id: Ib4ecae1e13cd5b73dda2f9b41c7f93bd79ddefd6
Signed-off-by: Yann Gautier <yann.gautier@st.com>
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PLAT_RO_XLAT_TABLES is only defined without a value, it should be
checked with `#ifdef`.
This corrects -Wundef GCC warnings.
Change-Id: Ib228f1bf60ff9f1127bccb02647dd54921f7f7a1
Signed-off-by: Yann Gautier <yann.gautier@st.com>
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PLAT_RO_XLAT_TABLES is only defined without a value, it should be
checked with `#ifdef`.
This corrects -Wundef GCC warnings.
Change-Id: I95df7e0721263fc4ca31ffeb1d582a74064be567
Signed-off-by: Yann Gautier <yann.gautier@st.com>
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The __aarch64__ is only defined, without a value, it should be checked
with #ifdef.
This corrects -Wundef GCC warning.
Change-Id: I4a3bcc78f8e0fe77069a7c7d254fcdfe6fd7d76e
Signed-off-by: Yann Gautier <yann.gautier@st.com>
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The __aarch64__ is only defined, without a value, it should be checked
with #ifdef.
This corrects -Wundef GCC warning.
Change-Id: Ifc5940421d4f8f8f553d14b215160dfe9fe9b482
Signed-off-by: Yann Gautier <yann.gautier@st.com>
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The __aarch64__ is only defined, without a value, it should be checked
with #ifdef.
This corrects -Wundef GCC warning.
Change-Id: I5eaced1ed72b0c45388cc4c0a896936a66fffd2c
Signed-off-by: Yann Gautier <yann.gautier@st.com>
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The __aarch64__ is only defined, without a value, it should be checked
with #ifdef.
This corrects -Wundef GCC warning.
Change-Id: Ibd8e7c9a7b1b766c9dad50f45230667575c3c60f
Signed-off-by: Yann Gautier <yann.gautier@st.com>
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When compiling with -Wmissing-prototypes for a platform that does not
enable ENABLE_FEAT_AMU, we have these warnings:
In file included from lib/el3_runtime/aarch64/context_mgmt.c:27:
include/lib/extensions/amu.h:29:6: warning: no previous prototype for
'amu_enable' [-Wmissing-prototypes]
29 | void amu_enable(cpu_context_t *ctx)
| ^~~~~~~~~~
include/lib/extensions/amu.h:32:6: warning: no previous prototype for
'amu_init_el3' [-Wmissing-prototypes]
32 | void amu_init_el3(unsigned int core_pos)
| ^~~~~~~~~~~~
include/lib/extensions/amu.h:35:6: warning: no previous prototype for
'amu_init_el2_unused' [-Wmissing-prototypes]
35 | void amu_init_el2_unused(void)
| ^~~~~~~~~~~~~~~~~~~
include/lib/extensions/amu.h:38:6: warning: no previous prototype for
'amu_enable_per_world' [-Wmissing-prototypes]
38 | void amu_enable_per_world(per_world_context_t *per_world_ctx)
| ^~~~~~~~~~~~~~~~~~~~
As those are stubs in this case, they should be static inline.
Change-Id: I7d33fa97fc8f189e4fb0a236ae0e1891505a1a49
Signed-off-by: Yann Gautier <yann.gautier@st.com>
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The different flags IMAGE_BL{1,2,31,32...} are only defined and not
assigned a value. The correct way to handle it is with `#if defined`.
This corrects warnings found with -Wundef GCC flag.
Change-Id: I3769c8862595bae98e31f764f1e9c5dd16480fea
Signed-off-by: Yann Gautier <yann.gautier@st.com>
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The different flags IMAGE_BL{1,2,31,32...} are only defined and not
assigned a value. The correct way to handle it is with `#if defined`.
This corrects warnings found with -Wundef GCC flag.
Whiel at it reverse the condition to include either context_el1.h or
context_el2.h in context.h.
This way the EL1 include is before and the includes are somewhat sorted
alphabetically. This corrects an include order issue with the static
check script.
Change-Id: I5a57ebab1dc73e7a7baa570b03f68a5d0118df98
Signed-off-by: Yann Gautier <yann.gautier@st.com>
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The different flags IMAGE_BL{1,2,31,32...} are only defined and not
assigned a value. The correct way to handle it is with `#if defined`.
This corrects warnings found with -Wundef GCC flag.
Change-Id: I024bb3545dc998e3833f854b1f1134be6bce68b9
Signed-off-by: Yann Gautier <yann.gautier@st.com>
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The different flags IMAGE_BL{1,2,31,32...} are only defined and not
assigned a value. The correct way to handle it is with `#if defined`.
This corrects warnings found with -Wundef GCC flag.
Change-Id: Ic17c13f46606610d2a1b09768421e0edeb185d4a
Signed-off-by: Yann Gautier <yann.gautier@st.com>
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Rule SYLMQQ tells that to do it as the buffer has no specific validity
requirements. Invalidate it in case whatever is in it is an EL3 secret.
Change-Id: Ieea4fecdd4606e5f9654e1429d7fe8510f5520ea
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
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Add support for Branch Record Buffer Extension v1.1. FEAT_BRBEv1p1
introduces MDCR_EL3.{E3BREW, E3BREC} which allow for branch recording at
EL3. This patch introduces helpers to start and stop recording as well
as dumping the branch record buffer to the console.
The helpers make sure that starting and stopping branch recording saves
and restores the lower EL BRBE context. This should help prevent
security and BRBE inconsistency issues if an actual payload is running
along side this. As this is a debug feature, no calls are expected to be
committed to the repository.
Note that this feature is marked as experimental. That is because
firmware does not need to support FEAT_BRBEv1p1 for the system to be
fully functional. As such, this flag may be renamed or removed in future
iterations once a precise usage model is arrived at.
Change-Id: Ibf2f1a5e9d36f759d7b381f06103d39debe23428
Co-developed-by: Arvind Ram Prakash <arvind.ramprakash@arm.com>
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
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FEAT_AxERR provide controls for relaxing when External Aborts need to be
reported synchronously. Currently cores implement both features
together, so add a single shared flag for both. The feature is only
enabled at EL3 as lower ELs have their own ungraded controls.
These features can be found in the M.a version of the Arm ARM.
Change-Id: Id70c353000bbdb3a625aaa1cf09f6290fe201a42
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
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Feature helpers are only needed when they are present in generic code.
Such features are few and far between and there is no need to keep a
list of a bunch that noone needs.
Change-Id: Ifc7e844d6572f450fa553825c2b16d9968bb5301
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
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The original purpose of the arch_features.h header was abstract away the
detection details for Architectural features into a central place. Over
time this has grown to a fully featured framework - ENABLE_FEAT.
However, as its scope has grown its promise of being a central
repository has faltered - there are independent lists of
FEATURE_DETECTION and FEAT_IDTE3. As a result, reasoning about all the
checkboxes a feature must tick is very convoluted and prone to errors.
Further, untangling what type a feature is rather difficult and requires
an understanding of the various CREATE_* helpers, of which there are
many permutations.
This patch resolves all of this by collating a truly central repository
for all ID related information about all Architectural features TF-A
needs to know about. Every feature receives a single X macro that
contains the 7 bits of information needed to reason about the features'
ID state: the ID register, field, and min/max known values, the enable
flag, and which worlds it'll be enabled for. This effectively combines
the present information in arch_features.h and feat_detect.c. Each entry
has been manually checked that it's been carried forward.
Then, features are organised into a handful of lists for easy usage.
These lists are used to generate the is_feat_abc_supported() functions,
check them with FEATURE_DETECTION, and mask them with FEAT_IDTE3. Each
function can pick and choose what it needs with an expansion macro.
Like errata, most features fit the central pattern exactly, but a
minority do not. Similarly to the errata framework, the architecture
features list can be unravelled progressively to allow as much reuse as
possible.
This patch surfaces a bug: FEAT_LS64_ACCDATA's feature detection min
value is 1 whereas it should be 3. This patch corrects this.
Another implicit modification is that the
check_if_trbe_disable_affected_core() call is omitted from the IDTE3
entry for FEAT_TRBE. This is because cores that observe this erratum
do not have FEAT_IDTE3 so the added complexity is not needed.
Along the central premise of the patch, some housekeeping must happen
atomically:
* FEAT_CRYPTO is downgraded from an architectural feature to a helper -
there is no ID register to check but the feature is always present
when either FEAT_AES or FEAT_SHA1 (and its superset FEAT_SHA2) are
present. Those are added as full features
* FEAT_IESB becomes a full feature, although it's only used for feature
detection
* the format of FEATURE_DETECTION changes ever so slightly to avoid
having to carry another entry in the database
* FEAT_IDTE3 receives a cosmetic rename to make things clearer
* FEAT_SSBS is now checked with FEATURE_DETECTION and awareness is
checked up to FEAT_SSBS2
* comments are moved towards their central locations and taken away from
the leaves
Change-Id: I0c02c3f18df6a80dc34ee81e304902ced3e3cdbb
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
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The original "CHECK" name was meant to describe the action the feature
will take. However, the "DISABLED" variant describes the state the
feature is in. General usage of the FEAT_STATE framework has converged
on referring to the features' state in both cases. So rename the macro
to stick to this.
Change-Id: Ie6fc8bc49d64ab6736ffc38bdba50c7adbe0e30c
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
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