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* changes:
feat(lfa): harden cancel handling and lock around LFA_CANCEL
feat(lfa): serialize activate across CPUs and manage rendezvous policy
feat(docs): add documentation page for BL31 LFA
feat(fvp): add FVP platform support for BL31 live activation
feat(lfa): update LFA service to support BL31 live activation
feat(lfa): lfa service updates
feat(lfa): add relocatable code for BL31 live activation
feat(lfa): xlat changes for BL31 LFA
feat(lfa): bl31 linker file updates for lfa
feat(lfa): add build flag for BL31 LFA support
feat: place errata into their own section
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- block cancel once all active CPUs have entered ACTIVATE
- take lfa_lock during cancel SMC handling
Change-Id: I1443644845d19e0322f5d188461a1c4083c57707
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
Signed-off-by: John Powell <john.powell@arm.com>
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Track activation state across CPUs so skip-rendezvous activations don’t
block or interleave. Split activate into prepare/finish to latch the
rendezvous policy, notify the platform once per activation, and only
clear activation_pending after all callers finish. Return LFA_BUSY for
conflicting skip requests and LFA_CALL_AGAIN for multi‑stage activations.
Change-Id: Id5a71fb6db12fe240e2bc1c9000606df935374b2
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
Signed-off-by: John Powell <john.powell@arm.com>
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This patch adds a documentation page about the BL31 LFA
implementation and outlines the limitations and requirements
to use it.
Change-Id: I55008a5a45561918bbf386bc1da96f6d281638a3
Signed-off-by: John Powell <john.powell@arm.com>
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This patch adds the platform components of BL31 live
activation.
Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: I5c08eecdc0420f05462740b72a59ee2e837cf701
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This patch adds the bulk of the BL31 live activation service
framework including the warm reset handler.
Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: Id9cbeeddbc023ee2540b88008e6c2502d816ee24
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This patch updates the LFA service components in preparation for
BL31 specific changes.
Change-Id: I6d4dd90b11fa1d8729c4f9026d2ddce0272aea76
Signed-off-by: John Powell <john.powell@arm.com>
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integration
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This patch adds the relocatable code functions that are copied
out of the main BL31 image during a live activation and updates
the holding pen code to have a relocatable variant.
Change-Id: I30ba6e118a6b888e0adf4dbd605d15ac0b40bea8
Signed-off-by: John Powell <john.powell@arm.com>
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This patch adds xlat library changes needed to support live
activation of BL31 images.
Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: I3956542b7978133dddcb0d1ace5512b6cfbfedc0
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This patch modifies the BL31 linker script to carve out regions
needed by BL31 live activation framework.
Change-Id: I8b5f38a62e159bf1cad8dc4ab74cf6a9bb137074
Signed-off-by: John Powell <john.powell@arm.com>
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This is the first patch in the series to enable live firmware
activation in BL31, and it adds the build flag to enable this to
the makefiles.
Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: I0b6f511e61f9cdcc8ee786507ee1c2e721147da7
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This patch moves CPU reset functions and reset errata workarounds
into their own linker subsections .text.errata and .rodata.errata,
as well as modifies CPU macros to allow this.
When BL31 LFA is integrated later, this allows these subsections
to be grouped together and padded, allowing them to be updated
during live activation without affectinn the rest of the BL31
image.
Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: Id6f248fa796a998152e4e0b946fa3717cb0cfbf6
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* changes:
fix(arm): validate last_at_pwrlvl before forwarding it
fix(psci): validate last_at_pwrlvl bounds before use
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* changes:
refactor(el3-runtime)!: remove PLAT_PCPU_DATA_SIZE
fix(el3-runtime): improve PLAT_PCPU_DATA_SIZE check
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integration
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integration
* changes:
fix(st): cast clk_get_rate return when setting console
fix(st): cast the read_cntfrq_el0() return to unsigned int
fix(st-clock): correct some STM32MP15 clock driver function
fix(st-pmic): store regulator ID as an uint8_t
fix(st-regulator): remove const for driver_data
fix(st-pmic): stub some functions for STPMIC1L
fix(st-sdmmc2): update plat_sdmmc2_use_dma prototype
fix(st-drivers): use BIT_32/GENMASK_32 in ST drivers
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The return of clk_get_rate() is an unsigned long. But for console, it
will never be above 4GHz, so it is safe to cast it to uint32_t, before
passing the parameter to set_console().
This corrects the warning:
plat/st/common/stm32mp_common.c:303:13: warning: implicit conversion
loses integer precision: 'unsigned long' to 'uint32_t' (aka 'unsigned
int')
[-Wshorten-64-to-32]
303 | clk_rate =
clk_get_rate((unsigned long)dt_uart_info.clock);
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Change-Id: I4c66f31ce5c002f39ffd8811fdf50496aa46f39d
Signed-off-by: Yann Gautier <yann.gautier@st.com>
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The function plat_get_syscnt_freq2() returns an unsigned int type, but
read_cntfrq_el0() that is used inside will return an uint64_t value
on aarch64 platforms (STM32MP2). But this value is usually 64MHz (HSI)
or 24MHz (HSE). It will never be above 4GHz, so it is safe to cast its
return value.
The issue was found with clang -Wshorten-64-to-32 warning.
Change-Id: Iab2162701cabfde4a4416bd4cea45eb15dbeeb5d
Signed-off-by: Yann Gautier <yann.gautier@st.com>
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The function clk_mux_get_parent() is not used in this driver, remove it.
Set clk_stm32_set_div() static as it is only used in this file for
STM32MP15.
This corrects the following warnings, when compiling with W=2:
drivers/st/clk/stm32mp1_clk.c:214:5: warning: no previous prototype
for 'clk_mux_get_parent' [-Wmissing-prototypes]
214 | int clk_mux_get_parent(struct stm32_clk_priv *priv, uint32_t
mux_id)
| ^~~~~~~~~~~~~~~~~~
drivers/st/clk/stm32mp1_clk.c:267:5: warning: no previous prototype for
'clk_stm32_set_div' [-Wmissing-prototypes]
267 | int clk_stm32_set_div(struct stm32_clk_priv *priv,
uint32_t div_id, uint32_t value)
| ^~~~~~~~~~~~~~~~~
Change-Id: I60f76ff0c7c591c5907caa08260987139bb57b7e
Signed-off-by: Yann Gautier <yann.gautier@st.com>
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The number of supported STPMIC2 regulators is 22, it is then less than
255 and can then be stored in an uint8_t field in the regul_handle_s
structure. And the STPMIC2 low level functions API always awaits the ID
as an uint8_t. This saves 88 bytes of data.
This also corrects the following warning:
drivers/st/pmic/stm32mp_pmic2.c:315:57: warning: conversion from
'uint32_t' {aka 'unsigned int'} to 'uint8_t' {aka 'unsigned char'} may
change value [-Wconversion]
315 | ret = stpmic2_regulator_set_prop(pmic2, id,
STPMIC2_PULL_DOWN, 1U);
| ^~
Change-Id: I859a1183f1f561bbc3b1a103267bf6fe62be6a60
Signed-off-by: Yann Gautier <yann.gautier@st.com>
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The driver_data will be used to store regul_handle_s data, but bypass_mv
is not const and will be updated at driver init. The driver_data should
then not be const.
The issue was seen when trying to correct issues seen with the GCC flag:
-Wdiscarded-qualifiers.
Change-Id: I19f42c6812bf6ed604ceca0a196e3103bec58dd2
Signed-off-by: Yann Gautier <yann.gautier@st.com>
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If STM32MP_STPMIC1L is enabled, we use the STPMIC2 driver, with STPMIC1
include file. And the functions print_pmic_info_and_debug() and
pmic_voltages_init() do nothing in that case. Instead of defining them
in STPMIC2 driver, stub them in STPMIC1 include file under the flag
STM32MP_STPMIC1L.
Change-Id: I503327daa5098c99c48bbd78fb2253cebfbf390b
Signed-off-by: Yann Gautier <yann.gautier@st.com>
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* changes:
feat(firme): add COMMON_MECID_WIDTH feat reporting
refactor(firme): suffix FIRME func IDs with _FID
feat(rmmd): route MEC refresh via FIRME
feat(firme): introduce FIRME MECID service
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Introduce COMMON_MECID_WIDTH in the FIRME MECID feature registers. The
value is initialized as the minimum of the architectural MECID width and
the maximum MECID width supported by platform peripherals. Note, this
feature register was accidentally omitted from ALP2 version of the
specification. It will be added in the next version of the
specification.
Change-Id: I6766c319b81dabacef76f771546ef7979e98c07d
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
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Rename FIRME function ID macros that were missing the _FID suffix and
update their call sites and documentation references for consistency.
Change-Id: Id34a2e5a71a027f2d9d3724fc7fe44852540875e
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
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Use FIRME_MEC_REFRESH as the provider for the RMM_MEC_REFRESH command
and remove replace the existing plat_rmmd_mecid_key_update() hook.
BREAKING-CHANGE: plat_rmmd_mecid_key_update() is deprecated for MEC
refresh flows and has been dropped. Platforms that currently implement
plat_rmmd_mecid_key_update() for MECID key refresh must migrate that
logic to plat_firme_mec_refresh(), including converting return values to
FIRME status codes.
Change-Id: I79985e0f7280b31e1fd149ef1e51bc9cf4b5a6cb
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
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Add the FIRME MECID management ABI and service implementation, advertise
the service through the base feature register when available, and
provide platform hooks for MEC refresh.
Change-Id: I1a1a2f2dd615274956d0db85049b0d6760fbcbc4
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
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into integration
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PM IPI protocol returns 32-bit words, but pm_pll_get_mode
previously passed an enum pm_pll_mode* to pm_ipi_send_sync.
This implicitly relied on the enum’s underlying width being
32 bits, which is not guaranteed and can break with compiler
options.
Use a local uint32_t to receive the response and assign to
*mode only on success.
Change-Id: I0631a5aa47a496bb5b34c716133e3948d96011a2
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>
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The function plat_sdmmc2_use_dma() is called with 2 parameters that are
uintptr_t. Adapt the function prototype to use uintptr_t instead of
unsigned int. It was not an issue on aarch32 platforms, but causes
warning on aarch64 platforms:
drivers/st/mmc/stm32_sdmmc2.c:549:52: warning: implicit conversion loses
integer precision: 'uintptr_t' (aka 'unsigned long') to 'unsigned int'
[-Wshorten-64-to-32]
549 | sdmmc2_params.use_dma = plat_sdmmc2_use_dma(base, buf);
| ~~~~~~~~~~~~~~~~~~~ ^~~
drivers/st/mmc/stm32_sdmmc2.c:549:46: warning: implicit conversion loses
integer precision: 'uintptr_t' (aka 'unsigned long') to 'unsigned int'
[-Wshorten-64-to-32]
549 | sdmmc2_params.use_dma = plat_sdmmc2_use_dma(base, buf);
| ~~~~~~~~~~~~~~~~~~~ ^~~~
Change-Id: I1f8b0cc9c75c7d5b4867847360502e92588f8259
Signed-off-by: Yann Gautier <yann.gautier@st.com>
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The ST peripherals registers are 32 bit, use explicit BIT_32/GENMASK_32
when reading from/writing to those registers. This avoids warnings when
the drivers are compiled for AARCH64 platforms (STM32MP2).
For example:
drivers/st/clk/clk-stm32-core.c:727:22: warning: implicit conversion
loses integer precision: 'uint64_t' (aka 'unsigned long') to 'uint32_t'
(aka 'unsigned int')
[-Wshorten-64-to-32]
727 | uint32_t mask_rdy = BIT(gate->bit_idx);
| ~~~~~~~~ ^~~~~~~~~~~~~~~~~~
Change-Id: I2510111f8b3e3bc3382f2bc35691451393435427
Signed-off-by: Yann Gautier <yann.gautier@st.com>
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integration
* changes:
feat(arm): add stubs for PCI SVC functions
fix(smccc): initialize ret for SMC_PCI_READ
refactor(rpi): remove add_define `SMC_PCI_SUPPORT`
fix(build): move `SMC_PCI_SUPPORT` flag management to Makefile
fix(build): move `USE_GIC_DRIVER` flag management in Makefile
fix(sdei): move `SDEI_SUPPORT` flag management in Makefile
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After putting the management of SMC_PCI_SUPPORT in Makefile, there is a
link error when compiling fvp platform with SMC_PCI_SUPPORT=1 in build
command line.
The issue was hidden by the fact that with the previous behavior, the
SMC_PCI_SUPPORT was only enabled in makefiles, and not in C files. And
then pci_smc_handler() was compiled but never used, and then dropped
during the link.
When putting SMC_PCI_SUPPORT flag management in Makefile with eval call
add_defines, this is no more the case. The functions called in the file
services/std_svc/pci_svc.c should then exist.
Create a new file plat/arm/common/arm_pci_svc.c that just stub the
required interfaces.
Change-Id: I68e7d32c80a17bb32486163f2dee59394c9877a1
Signed-off-by: Yann Gautier <yann.gautier@st.com>
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After implementing stub functions for PCI SVC on Arm platforms, there is
a build warning:
In function 'pci_smc_handler', inlined from 'std_svc_smc_handler'
at services/std_svc/std_svc_setup.c:227:10:
services/std_svc/pci_svc.c:82:25: error: 'ret' may be used uninitialized
[-Werror=maybe-uninitialized]
82 | SMC_RET2(handle, SMC_PCI_CALL_SUCCESS,
ret);
| ^
services/std_svc/pci_svc.c: In function 'std_svc_smc_handler':
services/std_svc/pci_svc.c:71:26: note: 'ret' was declared here
71 | uint32_t ret;
| ^
Initialize the ret variable to 0U.
Change-Id: I0e9d4a08c8b68d2afdb5ca9608aec591790dcc57
Signed-off-by: Yann Gautier <yann.gautier@st.com>
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The flag is now managed in Makefile, it does not need to be redefined
in platforms mk files.
Change-Id: I50e0af50fd61ca46176aa3e82ae5c525f92b2d1e
Signed-off-by: Yann Gautier <yann.gautier@st.com>
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The flag SMC_PCI_SUPPORT is set to 0 in make_helpers/defaults.mk. It can
then be defined in Makefile.
This will avoid warning for platforms not using SMC_PCI_SUPPORT with
-Wundef.
Change-Id: I142fd03ce3f01d098a2af93f63e7a3c322c71bdd
Signed-off-by: Yann Gautier <yann.gautier@st.com>
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USE_GIC_DRIVER is defined as 0 in make_helpers/defaults.mk.
For platforms not overriding this default parameter, the flag will then
not be defined and will trigger warning when enabling -Wundef flag.
Move the flag in the call add_defines in Makefile. While at it, add it
also in call assert_numerics.
Change-Id: I2d1ea9193e32ea004ed7f78fa51fa63a0da55f35
Signed-off-by: Yann Gautier <yann.gautier@st.com>
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SDEI_SUPPORT is set to 0 in make_helpers/defaults.mk, and can be set to
1 in platforms mk files. Its management with assert_booleans and
add_defines macros can then be done in Makfile.
For Aarch32 platforms, the bl31.mk file is not included, and the flag
is then not defined. It triggers warning when enabling -Wundef flag.
Change-Id: Icc034d711d70ae30e0ad78d177c8180d15f06d97
Signed-off-by: Yann Gautier <yann.gautier@st.com>
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integration
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The shared QEMU BL2 setup code in plat/qemu/common/qemu_bl2_setup.c
references TOS_FW_CONFIG_SIZE, and the sibling qemu_sbsa platform
already defines both TB_FW_CONFIG_SIZE and TOS_FW_CONFIG_SIZE. The
qemu platform was missing these and only defined the *_BASE and
*_LIMIT macros with PAGE_SIZE inlined.
Add the missing TB_FW_CONFIG_SIZE and TOS_FW_CONFIG_SIZE macros and
use them when computing the corresponding *_LIMIT values, so the
qemu platform matches qemu_sbsa and the common code resolves the
size correctly.
Change-Id: I1eda1402f99c748e79db198489ce2915aebe8cca
Signed-off-by: Kun Qin <kuqin@microsoft.com>
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The HAB SIP handler forwards Normal World pointer arguments directly
to the HAB ROM API without validation. Add range checks to ensure
pointers reference Non-Secure DRAM before forwarding.
Harden the REPORT_EVENT and REPORT_STATUS cases in the HAB SMC
handler:
- Validate NS pointer arguments against Non-Secure DRAM via
smc_validate_mem_range() before forwarding to the ROM API.
- Copy indirect pointer targets (size_t *, enum hab_config *,
enum hab_state *) into EL3-local shadow variables so the ROM
API operates on stable copies.
- Make g_hab_rvt_api static const to prevent inadvertent
modification of the ROM vector table pointer.
Add plat_is_valid_ns_address_range() for i.MX8M, overriding the
default weak implementation to restrict valid Non-Secure memory
to the DRAM region (excluding the BL32 carve-out), and wire it
into BL31 for all four i.MX8M variants (8MM, 8MN, 8MP, 8MQ).
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: I2cc98277568f15873c48b5c1ebc9496f90e49659
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* changes:
fix(nxp-ddr): adjust DDR_DSR2[2] per LX2160A RM
fix(nxp-ddr): support SPD diffs between dual DIMMs
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Add an explicit bounds check in `arm_validate_power_state()` for
last_at_pwrlvl so the extracted value is validated against
PLAT_MAX_PWR_LVL before it is used.
Change-Id: I0a0dbc9e60713796b99bc4b9d11b403671c0e334
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
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